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| title | Figure 1: TE0782-02 block diagram |
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Main Components
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| title | Figure 2: TE0782-02 main components |
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- Xilinx Zynq UltraScale+ MPSoC, U1
- Lattice Semiconductor MachXO2 1200HC CPLD, U14
- 4Gbit DDR3L SDRAM, U19
- 4Gbit DDR3L SDRAM, U10
- I²C voltage translator, U25
- Intersil ISL12020MIRZ Real Time Clock, U17
- Microchip USB3320C USB PHY transceiver, U4
- Microchip USB3320C USB PHY transceiver, U8
- SiTime SiT8008 52.000000 MHz oscillator, U7
- 32 MByte QSPI Flash memory, U38
- SiTime SiT8008 33.333333 MHz oscillator, U61
- SI5338A programmable quad PLL clock generator, U2
- SiTime SiT8008 25.000000 MHz oscillator, U3
- TPS74801 LDO @1.5V, U23
- LT quad 4A PowerSoC DC-DC converter (@1.0V), U13
- LT quad 4A PowerSoC DC-DC converter (@3.3V, @1,8V, @1.2V_MGT, @1.0V_MGT), U16
- Samtec ASP-122952-01 160-pin stacking strip (2 rows a 80 positions), J2
- Samtec ASP-122952-01 160-pin stacking strip (2 rows a 80 positions), J3
- Samtec ASP-122952-01 160-pin stacking strip (2 rows a 80 positions), J1
- Marvell Alaska 88E1512 Gigabit Ethernet PHY, 20
- Marvell Alaska 88E1512 Gigabit Ethernet PHY, U18
- Micron Technology 4 GByte eMMC, U15
- Microchip 128Kbit I²C EEPROM, U26
- Microchip 2Kbit I²C MAC EEPROM, U24
- Microchip 2Kbit I²C MAC EEPROM, U22
- TPS51206 DDR reference voltage and termination regulator, U6
- TPS799 LDO @1.8V_MGT, U5
- SiTime SiT8008 25.000000 MHz oscillator, U11
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| anchor | Figure_3 |
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| title | Figure 3: TE0782-02 Power Distribution Diagram |
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See also Xilinx datasheet DS191 for additional information. User should also check related base board documentation when intending base board design for TE0782 module.
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| anchor | Figure_4 |
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| title | Figure 4: TE0782-02 Power-on Sequence Diagram |
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For highest efficiency of the on-board DC-DC regulators, it is recommended to use one 3.3V power source for both VIN and 3.3VIN power rails. Although VIN and 3.3VIN can be powered up in any order, it is recommended to power them up simultaneously.
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