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The Trenz Electronic TEF1001 FPGA board is a PCI Express form factor card (PCIe 2.0 or higher) integrating the Xilinx Kintex-7 XC7K160T, XC7K325T or XC7K410T FPGA SoC. The FPGA-board is designed for high system resources and intended for use in applications with high demands on system performance and throughput. The board offers a SO-DIMM socket on the board for standard DDR3 SDRAM extension memory moduleTo extent the board with standard DDR3 SDRAM memory module, there is a 204-pin SODIMM socket with 64bit databus width on the board present.

The board offers a HPC (High Pin Count) ANSI/VITA 57.1 compatible FMC interface connector for standard FPGA Mezzanine cards and modules. Other interface connectors found on-board include JTAG for accessing FPGA and on-board System Controller CPLD, and also connector with 5 high-speed I/O differential signaling pairs.

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1. Xilinx Kintex XC7K-2FBG676I FPGA SoC, U6
2. ANSI/VITA 57.1 compliant FMC HPC connector, J2
3. Cooling fan 5VDC M1 (45X5MM, 0.7W, 1.06CFM), M1
4. PCIe x8 connector, J1
5. SO-DIMM socket, U2
6. 6-pin 12V power connector, J5
7. Step-down DC-DC converter @1.5V and @4V (LT LTM4676A), U3
8. Step-down DC-DC converter @1.0V (LT LTM4676A), U4
9. 256 Mbit Quad SPI Flash Memory (Micron N25Q256A), U12
10. 10x Green user LEDs, D1 ... D10
11. 4-wire PWM fan connector, J4
12. User button, S2
13. FPGA JTAG connector, J9
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30. FPGA JTAG connector, J9
31. User button, S2
32. SO-DIMM socket, U2
33. Xilinx Virtex-7 XC7VX330T-2FFG1157C FPGA, U1
34. ANSI/VITA 57.1 compliant FMC HPC connector, J2
35. SMA coaxial connector for external clock input, J3
36. System Controller CPLD JTAG connector, J8
37. I²C connector for LT LTM4676 step-down DC-DC regulator, J10
38. IDC header for access to 5 x high-speed data lanes (LVDS pairs), J7
39. 4-wire PWM fan connector, J4
40. 6-pin 12V power connector, J5
41. Reference clock generator @10.0 MHz (P5146) , U11
42. LDO DC-DC regulator @3.3V (LMK_3V3) (TI TPS74901RGWR), U21
43. 256 Mbit Quad SPI Flash Memory (Micron N25Q256A), U12
44. Cooling fan 5VDC M1 (45X5MM, 0.7W, 1.06CFM)
45. System Controller CPLD (Lattice Semiconductor LCMXO2-1200HC), U5
46. Ultra low jitter clock synthesizer (TI LMK04828B), U9
47. Step-down DC-DC regulator @1.0V (LT LTM4676), U4
48. Step-down DC-DC regulator @1.5V (VCC1V5) (LT LTM4676, U3
49. I²C Programmable quad clock generator (Silicon Labs Si5338A), U13
50. 4A PowerSoC DC-DC converter @1.8V (Altera EN6347QI, U20
51. LDO DC-DC regulator @1.0V (MGTAVCC_FPGA) (TI TPS74401RGW), U18
52. LDO DC-DC regulator @1.2V (MGTAVTT_FPGA) (TI TPS74401RGW), U17
53. 4A PowerSoC DC-DC converter @3.3V (3V3FMC) (Altera EN6347QI), U15
54. 4A PowerSoC DC-DC converter @1.8V (FMC_VADJ) (Altera EN6347QI), U7

Initial Delivery State

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