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1. Unzip Reference Design
   
   IMPORTANT: Do not change base folder name after extraction!
                         <install_path>\TE0701_zsys_SDSoC_EDDP_FOC\zsys\
   
   
2. CD to the directory and run from win terminal:
   _create_win_setup.cmd
   
   run from win terminal:
   _use_virtual_drive.cmd
   reply to select an virtual drive name (example X): X
   reply: 0
   
   cd X:\zsys
   
   This is shortest possible path and directory name for building of the platform
   in windows (to respect the 260 character limitations.)
   
   NOTE:
   Do not change the name of the directory /zsys
   It has to be identical to the shortest possible platform name “zsys”
   for the Zynq 7000 targets.
   
   
3. Enable SDSOC, set install path of Xilinx tools, set your hardware assembly option in: "design_basic_settings.cmd" Select one of these supported modules (1,4,5,6,7):
   
   1            te0720-03-2if  
   4            te0720-03-l1if
   5            te0720-03-1cf
   6            te0720-03-2ef
   7            te0720-03-07s 
   
   NOTE:  Selection 7 supports the TE0720-03-14S-1C module (xc7z014sclg484-1c device).
   
   
4. Create  Create Reference Design: run "vivado_create_project_guimode.cmd"
   
   
5. VIVADO:
1. TCL-Console type: TE::hw_build_design -export_prebuilt
2. Find hardware handoff file .hdf under prebuilt folder abd copy it to Ubuntu 16.04, with Petalinux 2017.1.
   
   

NOTE (important): Before petalinux project can be built, the rights of the executeable (if not set, set them) executable rights must be set for these files:

./init_config.sh
./project-spec/meta-user/recipes-apps/libuv/files/checksparse.sh
./project-spec/meta-user/recipes-apps/libuv/files/gyp_uv.py
./project-spec/meta-user/recipes-apps/libuv/files/autogen.sh
./project-spec/meta-user/recipes-apps/libuv/files/android-configure
./project-spec/meta-user/recipes-apps/libuv/update-src.sh

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1. Wait for project creation:
1. SDSoC Platform is created in 
   X:\zsys\SDSoC_PFM\<TE::SHORTDIR>\zsys
2. Copy
   X:\zsys\_use_virtual_drive.cmd
   to
   X: \SDSoC_PFM\<TE::SHORTDIR>\zsys
3. Copy these two files from:
   X:\zsys\init.sh
   X:\zsys\focserver.conf
   to
   X:\SDSoC_PFM\<TE::SHORTDIR>\zsys\sw\linux\image\init.sh
   X:\SDSoC_PFM\<TE::SHORTDIR>\zsys\sw\linux\image\focserver.conf
4. Copy directory with all files from:
   X:\zsys\misc\src\
   to
   X: \SDSoC_PFM\<TE::SHORTDIR>\zsys\src\
5. Copy directory with all files from:
   X:\zsys\misc\sw\aarch32-linux\
   X:\zsys\misc\sw\aarch32-none\
   to
   X: \SDSoC_PFM\<TE::SHORTDIR>\zsys\sw\aarch32-linux\
   X: \SDSoC_PFM\<TE::SHORTDIR>\zsys\sw\ aarch32-none\
2. Close current Vivado project
3. Clear working project files by script
   X:\zsys\design_clear_design_folders.cmd
4. From win terminal, execute:
   _use_virtual_drive.cmd
   reply to select an virtual drive name (example X): X
   reply: 1
   This will disconnect the virtual X: drive
5. Compile support libraries serving for connection to 64bit AXI I/O.
   Open the SDx Terminal 2017.1
   CD to: <install_path>\TE0701_zsys_SDSoC_EDDP_FOC\SDSoC_PFM\<TE::SHORTDIR>\zsys\src\
   In the SDx Terminal 2017.1, run batch file:
   build_linux.bat
   Library for the SDSoC Linux target is created:
   <install_path>\TE0701_zsys_SDSoC_EDDP_FOC\SDSoC_PFM\<TE::SHORTDIR>\zsys\src\libte0720_foc.a
   Move the created library libte0720_foc.a to
   c:\TV71u<install_path>\TE0701_zsys_SDSoC_EDDP_FOC\SDSoC_PFM\te0720_2if<TE::SHORTDIR>\zsys\sw\aarch32-linux\lib\libte0720_foc.a
   Delete the created _sds directory
   <install_path>\TE0701_zsys_SDSoC_EDDP_FOC\SDSoC_PFM\<TE::SHORTDIR>\zsys\src\_sds
   
   In the SDx Terminal 2017.1, run batch file:
   build_standalone.bat
   Library for the SDSoC standalone target is created:
   <install_path>\TE0701_zsys_SDSoC_EDDP_FOC\SDSoC_PFM\<TE::SHORTDIR>\zsys\src\libte0720_foc.a
   Move the created library libte0720_foc.a to
   <install_path>\TE0701_zsys_SDSoC_EDDP_FOC\SDSoC_PFM\<TE::SHORTDIR>\\zsys\sw\aarch32-none\lib\ libte0720_foc.a
   Delete the created _sds directory
   <install_path>\TE0701_zsys_SDSoC_EDDP_FOC\SDSoC_PFM\<TE::SHORTDIR>\zsys\src\_sds
   The SDSoC platform for the target \<TE::SHORTDIR> is in
   <install_path>\TE0701_zsys_SDSoC_EDDP_FOC\SDSoC_PFM\<TE::SHORTDIR>
   
   Close the SDx Terminal 2017.1 

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1. Start SDSoC 2017.1 in the directory
2. Select Workspace
   
   X:\ <TE::SHORTDIR>
3. Click "Create SDSoC Project"
1. Set Project Name (example: foc01)
2. Set Platform:
1. Others. Path to Project is:
   X:\ <TE::SHORTDIR>\zsys
3. Select OS: Linux
4. Click "Next"
5. Select Template Application "focserver"  "Field Oriented Control with Web UI"
6. Click "Finished"
7. Right click on the project -> C/C++ Build Settings
   In the top level Configuration menu select [All configurations]
8. Add libraries 'te0720_foc' and 'dl' to the linker flags! -> SDS++ Linker -> Libraries
9. Add path to directory with Linux version of the 'libte0720_foc.a' library! -> SDS++ Linker -> Libraries
   Example for <TE::SHORTDIR> = te0720_2if:
   "X:/te0720_2if/zsys/sw/aarch32-linux/lib"
10. Add path to directory with te0720_foc.h! -> SDSCC Compiler -> Directories
    Example for <TE::SHORTDIR> = te0720_2if:
    "X:/te0720_2if/zsys/sw/aarch32-linux/include"
11. Add path to directory with te0720_foc.h! -> SDS++ Compiler -> Directories
    Example for <TE::SHORTDIR> = te0720_2if:
    "X:/te0720_2if/zsys/sw/aarch32-linux/include"
12. In main SDx Project Settings:
    unselect box [] Generate bitstream
    unselect box [] Generate SD card image
    
    these two un-selections will accelerate the initial compilation of the platform, needed for creation of the final platform hdf file needed for generation of the final image.ub in the Petalinux 2017.1 under the Ubuntu. (cca 3 min instead of 20 min with these options selected).
    
    The .hdf description of the foc01 HW design and related drivers is created in file (Example for <TE::SHORTDIR> = te0720_2if):
    
    X:\te0720_2if\foc01\Debug\_sds\p0\ipi\zsys.sdk\zsys.hdf  
13. Copy created file zsys.hdf to Petalinux 2017.1 in Ubuntu 16.04 and recompile the configuration of Petalinux with this .hdf file.
    
    Result of this compilation is updated image.ub which includes device tree with the AXI-lite driver, created by the SDSoC initial compilation step. This driver is used by the focserver to set parameters of the HW accelerated SDSoC implementation of the FOC algorithm.
14. Replace the initial image.ub of the SDSoC platform with the created final image.ub by copy to (Example for <TE::SHORTDIR> = te0720_2if):
    X:\te0720_2if\zsys\sw\linux\image\image.ub
15. In SDSoC, clear the foc01 project.
16. In main SDx Project Settings:
    select box [x] Generate bitstream
    select box [x] Generate SD card image
17. Select Build project foc01
    The SDSoC project is recompiled (cca 20 min) with foc01 integrated in HW.
    SDCard image is createdTest SDCard in HW.

Launch

1. Copy created files to the SD card.
2. ON PC, set the Ethernet address to 192.168.42.100
3. Connect PC with Ethernet cable to the TE0701 board.
4. Connect serial terminal via the USB cable.
5. Power ON TEC0053-04 - EDPS Power Stage (12V).
6. Power ON TE0701 board (12V).
7. On PC, open serial terminal.
8. Reset TE0701 board (by S2 button).
9. Boot of Linux starts up to login stage. Login as 'root' with
pswd
10. password 'root'.
    To see top running processes,
type
11. type 
    top
    you can see running process
    focserver
    
    On PC, open www browser and connect
to
12. to 
    http://192.168.42.123
    to connect to the focserver running on the TE0720 module.
    
    Use the GUI to start and control the BLDC motor and to visualize data.
     
13.      

References

•  SDSoC Environment - User Guide (UG1027)
•  SDSoC Environment User Guide - An Instruction to SDSoC Environment (UG1028)
•  SDSoC Environment User Guide - Platforms and Libraries (UG1146)

Launch

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Appx. A: Change History and Legal Notices

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