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DateVivadoProject BuiltAuthorsDescription
2018-08-132018.2te0720-test_board-vivado_2018.2-build_02_20180810162024.zip
te0720-test_board_noprebuilt-vivado_2018.2-build_02_20180810162040.zip
John Hartfiel
  • 2018.2 update
  • Boart Part Files rework
2018-04-262017.4te0720-test_board-vivado_2017.4-build_07_20180426144351.zip
te0720-test_board_noprebuilt-vivado_2017.4-build_07_20180426144405.zip
John Hartfiel
  • new assembly variant
2018-03-122017.4te0720-test_board_noprebuilt-vivado_2017.4-build_06_20180312152408.zip
te0720-test_board-vivado_2017.4-build_06_20180312152419.zip
John Hartfiel
  • add assembly variant
  • script update
2018-01-092017.4te0720-test_board_noprebuilt-vivado_2017.4-build_02_20180109121313.zip
te0720-test_board-vivado_2017.4-build_02_20180109121300.zip
John Hartfiel
  • no design changes
  • set EEPROM MAC with FSBL+u-boot
  • FSBL for QSPI Programming
2017-11-272017.2te0720-test_board_noprebuilt-vivado_2017.2-build_05_20171127153028.zip
te0720-test_board-vivado_2017.2-build_05_20171127153006.zip
John Hartfiel
  • remove duplicated content
2017-11-202017.2te0720-test_board_noprebuilt-vivado_2017.2-build_05_20171122074701.zip
te0720-test_board-vivado_2017.2-build_05_20171122074646.zip
John Hartfiel
  • initial release

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SoftwareVersionNote
Vivado20172018.42needed
SDK20172018.42needed
PetaLinux20172018.42needed

Hardware

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Hardware Support
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Reference Design is available on:

Design Flow

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Basic Design Steps
Add/ Remove project specific 
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  1. Connect JTAG and power on carrier with module
  2. Open Vivado Project with "vivado_open_existing_project_guimode.cmd" or if not created, create with "vivado_create_project_guimode.cmd"
  3. Type on Vivado TCL Console: TE::pr_program_flash_binfile -swapp u-boot
    Note: To program with SDK/Vivado GUI, use special FSBL (zynq_fsbl_flash) on setup
             optional "TE::pr_program_flash_binfile -swapp hello_te0720" possible
  4. Copy image.Copy image.ub on SD-Card
  5. Insert SD-Card

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For SDK project creation, follow instructions from:

SDK Projects

Application

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Template location: ./sw_lib/sw_apps/

zynq_fsbl

TE modified 20172018.4 2 FSBL

Functions:

  • Read EEPROM MAC Address and make Address accessible by UBOOT (need copy defines on uboot  platform-top.h)
  • Read CPLD Firmware and SoC Type
  • CPLD Interface
  • Configure Marvell PHY

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zynq_fsbl_flash

TE modified 20172018.4 2 FSBL

Changes:

  • Set FSBL Boot Mode to JTAG
  • Disable Memory initialisation

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hello_te0720

Hello World App in Endless loop.

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u-

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boot

U-Boot.elf is generated with PetaLinux. SDK/HSI is used to generate Boot.bin.

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  • Subsystem Auto Hardware Settings:Serial Settings: ps7_uart_0

U-Boot

Code Block
languagejs

#include <configs/platform-auto.h>

#define CONFIG_SYS_PREBOOT    "echo U-BOOT for petalinux;echo importing env from FSBL shared area at 0xFFFFFC00; if itest *0xFFFFFC00 == 0xCAFEBABE; then echo Found valid magic; env import -t 0xFFFFFC04; fi;setenv preboot; echo; dhcp"

Device Tree

BOOTM_LEN 0xF000000
#define DFU_ALT_INFO_RAM \
                "dfu_ram_info=" \
        "setenv dfu_alt_info " \
        "image.ub ram $netstart 0x1e00000\0" \
        "dfu_ram=run dfu_ram_info && dfu 0 ram 0\0" \
        "thor_ram=run dfu_ram_info && thordown 0 ram 0\0"

#define DFU_ALT_INFO_MMC \
        "dfu_mmc_info=" \
        "set dfu_alt_info " \
        "${kernel_image} fat 0 1\\\\;" \
        "dfu_mmc=run dfu_mmc_info && dfu 0 mmc 0\0" \
        "thor_mmc=run dfu_mmc_info && thordown 0 mmc 0\0"


/*Required for uartless designs */
#ifndef CONFIG_BAUDRATE
#define CONFIG_BAUDRATE 115200
#ifdef CONFIG_DEBUG_UART
#undef CONFIG_DEBUG_UART
#endif
#endif

/*Define CONFIG_ZYNQ_EEPROM here and its necessaries in u-boot menuconfig if you had EEPROM memory. */
#ifdef CONFIG_ZYNQ_EEPROM
#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN         1
#define CONFIG_SYS_I2C_EEPROM_ADDR             0x54
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS      4
#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  5
#define CONFIG_SYS_EEPROM_SIZE                 1024 /* Bytes */
#define CONFIG_SYS_I2C_MUX_ADDR                0x74
#define CONFIG_SYS_I2C_MUX_EEPROM_SEL          0x4
#endif

#define CONFIG_PREBOOT    "echo U-BOOT for petalinux;echo importing env from FSBL shared area at 0xFFFFFC00; if itest *0xFFFFFC00 == 0xCAFEBABE; then echo Found valid magic; env import -t 0xFFFFFC04; fi;setenv preboot; echo; dhcp"

Device Tree

Code Block
languagejs
/include/ "system-conf.dtsi"
/ {
};


/* default */

/* QSPI PHY */
&qspi {
    #address-cells = <1>;
    #size-cells = <0>;
    status = "okay";
    flash0: flash@0 {
        compatible = "jedec,spi-nor";
        reg = <0x0>;
        #address-cells = <1>;
Code Block
languagejs
/include/ "system-conf.dtsi"
/ {
};



/* default */

/* Flash */
&qspi {
    flash0: flash@0 {
        compatible#size-cells = "w25q256"<1>;
    };
};


/* ETH PHY */
&gem0 {
    phy-handle = <&phy0>;
    mdio {
        #address-cells = <1>;
        #size-cells = <0>;
        phy0: phy@0 {
            compatible = "marvell,88e1510";
            device_type = "ethernet-phy";
            reg = <0>;
        };
    };
};

/* USB PHY */

/{
    usb_phy0: usb_phy@0 {
        compatible = "ulpi-phy";
        //compatible = "usb-nop-xceiv";
        #phy-cells = <0>;
        reg = <0xe0002000 0x1000>;
        view-port = <0x0170>;
        drv-vbus;
    };
};

&usb0 {
    dr_mode = "host";
    //dr_mode = "peripheral";
    usb-phy = <&usb_phy0>;
};

/* I2C need I2C1 connected to te0720 system controller ip */
&i2c1 {

    iexp@20 {       // GPIO in CPLD
        #gpio-cells = <2>;
        compatible = "ti,pcf8574";
        reg = <0x20>;
        gpio-controller;
    };

    iexp@21 {       // GPIO in CPLD
        #gpio-cells = <2>;
        compatible = "ti,pcf8574";
        reg = <0x21>;
        gpio-controller;
    };

    rtc@6F {        // Real Time Clock
        compatible = "isl12022";
        reg = <0x6F>;
    };
};

Kernel

Activate:

  • RTC_DRV_ISL12022

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DateDocument RevisionAuthorsDescription

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modified-date
modified-date
dateFormatyyyy-MM-dd

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current-version
current-version
prefixv.



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modified-user
modified-user

  • 2018.4 release

v.22John Hartfiel
  • add assembly variant
2018-02-20v.20John Hartfiel
  • small documentation update
2018-01-09v.16John Hartfiel
  • Release 2017.4
  • Documentation update
2017-11-27v.14John Hartfiel
  • Typo correction
  • Design Files update
2017-11-22v.12John Hartfiel
  • Update HW list
2017-11-22

v.11

John Hartfiel
  • Release 2017.2
2017-11-20v.1

Page info
created-user
created-user

  • Initial release

All

Page info
modified-users
modified-users


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