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changes.mady.by.user Ali Naseri

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New Version 69

changes.mady.by.user John Hartfiel

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Scroll Title
anchorFigure_2
titleFigure 2: TE0820-03 main components (Attention photo show revision 01)
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draw.io Diagram
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diagramNameTE0820 main components
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  1. Xilinx Zynq UltraScale+ MPSoC, U1
  2. 1.8V, 512 Mbit QSPI flash memory, U7
  3. 1.8V, 512 Mbit QSPI flash memory, U17
  4. 8 Gbit (512 x 16) DDR4 SDRAM, U2
  5. 8 Gbit (512 x 16) DDR4 SDRAM, U3
  6. Marvell Alaska 88E1512 integrated 10/100/1000 Mbps energy efficient ethernet transceiver, U8
  7. 6A PowerSoC DC-DC converter (PL_VCCINT, 0.85V), U5
  8. B2B connector Samtec Razor Beam™ LSHM-150, JM1
  9. B2B connector Samtec Razor Beam™ LSHM-150, JM2
  10. B2B connector Samtec Razor Beam™ LSHM-130, JM3
  11. 4 GByte eMMC memory, U6
  12. Lattice Semiconductor MachXO2 System Controller CPLD, U21
  13. I2C programmable, any  frequency , any output  quad clock generator, U10
  14. Highly integrated full featured hi-speed USB 2.0 ULPItransceiver, U18
  15. LED D1(Red) Done Pin
  16. LED D2 (Green) CPLD Status, User LED
  17. LED D3 (Red) PS Error
  18. LED D4 (Green) PS Error Status

Initial Delivery State

 Storage Device Name

Content

Notes

SPI Flash OTP Area

Empty, not programmed

Except serial number programmed by flash vendor.

SPI Flash Quad Enable bit

Programmed

-

SPI Flash main array

Not programmed

-

eFUSE USER

Not programmed

-

eFUSE Security

Not programmed

-
Si5338 OTP NVMNot programmed-
CPLD (LCMXO2-256HC)SC0820-02 QSPI FirmwareSee Boot Process section.

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Date

Revision

Contributors

Description

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Page info
infoTypeCurrent version
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infoTypeModified by
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  • typ correction, add LEDs to component list (not on the picture)

v.69Ali Naseri
  • Update PCB Rev03

v.61John Hartfiel
  • Rework chapter currently available products
  • add PJTAG note to MIOtable
2018-03-12v.54
  • Correction Power Rail Section
2017-11-20v.51John Hartfiel
  • Correction Default MIO Configuration Table
2017-11-10v.50John Hartfiel
  • Replace B2B connector section
2017-10-18v.49John Hartfiel
  • add eMMC section
2017-09-25v.48John Hartfiel
  • Correction in the "Board to Board (B2B) I/Os" section
  • Update in the "Variants Currently In Production" section
2017-09-18v.47John Hartfiel
  • Update PS MIO table
2017-08-30v.46Jan Kumann
  • MGT lanes section added.

2017-08-24

v.36

John Hartfiel
  • Correction in the  "Key Features" section.
2017-08-21v.34John Hartfiel
  • "Initial delivery state" section updated.
2017-08-21v.33Jan Kumann
  • HW revision 02 block diagram added.
  • Power distribution and power-on sequence diagram added.
  • System Controller CPLD and DDR4 SDRAM sections added.
  • TRM update to the template revision 1.6
  • Weight section removed.
  • Few minor corrections.



2017-08-18


v.7

John Hartfiel
  • Style changes
  • Updated "Boot Mode", "HW Revision History", "Variants Currently In Production" sections
  • Correction of MIO SD Pin-out, System Controller chapter
  • Update and new sub-sections on "On Board Peripherals and Interfaces" sections

2017-08-07

v.5

Jan Kumann

Initial version

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