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Depending on the customer design, additional cooling might be required.
test
Block Diagram
| Scroll Title |
|---|
| anchor | Figure_OV_BD |
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| title | TE0728 block diagram |
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|
| Scroll Ignore |
|---|
| draw.io Diagram |
|---|
| border | false |
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| viewerToolbar | true |
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| |
|---|
| fitWindow | false |
|---|
| diagramDisplayName | |
|---|
| lbox | false |
|---|
| revision | 4 |
|---|
| diagramName | TE0728_OV_BD |
|---|
| simpleViewer | false |
|---|
| width | 550 |
|---|
| links | auto |
|---|
| tbstyle | hidden |
|---|
| diagramWidth | 641 |
|---|
|
|
| Scroll Only |
|---|
| draw.io Diagram |
|---|
| border | false |
|---|
| viewerToolbar | true |
|---|
| |
|---|
| fitWindow | false |
|---|
| diagramDisplayName | |
|---|
| lbox | false |
|---|
| revision | 4 |
|---|
| diagramName | TE0728_OV_BD |
|---|
| simpleViewer | false |
|---|
| width | 550 |
|---|
| links | auto |
|---|
| tbstyle | hidden |
|---|
| diagramWidth | 641 |
|---|
|
|
|
...
| Scroll Title |
|---|
| anchor | Table_OV_IDS |
|---|
| title | Initial delivery state of programmable devices on the module |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
Storage device name | Symbol | Content | Notes |
|---|
Quad SPI Flash | U13 | Empty | | DDR3 SDRAM24xx64 | U1U11 | Empty | 24LC64 | U11 | Not Programmed |
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Control Signals
| Page properties |
|---|
|
- Overview of Boot Mode, Reset, Enables,
|
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| Scroll Title |
|---|
| anchor | Table_OV_BP |
|---|
| title | Boot process. |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
MIO pin | MODE Signal State | Boot Mode |
|---|
MIO4 | Low | QSPI | | MIO4 | High | or open | QSPISD Card |
|
Signals, Interfaces and Pins
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| Scroll Title |
|---|
| anchor | Table_SIP_JTG |
|---|
| title | JTAG pins connection |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
JTAG Signal | B2B Pin |
|---|
| TMS | JM2-12 | | TDI | JM2-10 | | TDO | JM2-8 | | TCK | JM2-6 |
|
...
UART
There is no fixed mapping for PS7 UART, if needed it can be mapped to free pins from MIO1 Bank or via EMIO to PL pins.
Recommended mapping for primary (console, debug) UART are MIO52, MIO53 for all cases when MIO1 is not used for off-board Gigabit ETH PHY.
On-board Peripherals
| Page properties |
|---|
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Notes : - add subsection for every component which is important for design, for example:
- Two 100 Mbit Ethernet Transciever PHY
- USB PHY
- Programmable Clock Generator
- Oscillators
- eMMCs
- RTC
- FTDI
- ...
- DIP-Switches
- Buttons
- LEDs
|
...
| Scroll Title |
|---|
| anchor | Table_OBP |
|---|
| title | On board peripherals |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| Chip/Interface | ICSymbol | PS7 Peripheral | Notes |
|---|
| SPI Flash | S25FL127SABMFV10 | QSPI0 | 16 MByte Flash | | I2C EEPROM | 24LC64 | I2C0 | 64 Kbit EEPROM | | RTC I2C | RV-3029 | I2C0 |
| | RTC Interrupt | RV-3029 | GPIO - MIO0 |
| | User LED | LED Green | GPIO - MIO7 |
|
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