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Scroll Title
anchorTable_OBP_MIOs
titleMIOs pins

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MIO PinSchematic
U13 Pin
Notes
MIO0MIO0RTC interrupt
Notes
MIO1SPI_CS
A1
SPI Flash
MIO2SPI_DQ0/M0
A2
SPI Flash
MIO3SPI_DQ1/M1
F6
SPI Flash
MIO4SPI_DQ2/M2
E4
SPI Flash
MIO5SPI_DQ3/M3
A3
SPI Flash
MIO6SPI_SCK/M4
A4
SPI Flash clock
MIO7LED REDLED
MIO8DCAN Transceiver
MIO9RCAN Transceiver
MIO10IO_0JM1-7
MIO11IO_1JM1-9
MIO12IO_2JM1-11
MIO13IO_3JM1-13
MIO14SCLEEPROM
MIO15SDAEEPROM
MIO16-MIO53PS_MIOxxBank 501


UART

There is no fixed mapping for PS7 UART, if needed it can be mapped to free pins from MIO1 Bank or via EMIO to PL pins.

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Scroll Title
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titleOn board peripherals

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Chip/InterfaceProductNotes
SPI FlashS25FL127SABMFV10U1316 MByte Flash
EEPROM24LC64U1164 Kbit EEPROM
RTCRV-3029U7Real Time Clock
DDR3 SDRAMNT5CC256M16DP NanyaU1Volatile Memory
EthernetDP83848-EPU3, U10
CAN TransceiverSN65HVD230QU16
User LEDD4Green LED Green


Quad SPI Flash Memory

On-board QSPI flash memory is used to store initial FPGA configuration. Datasheet is provided in Texas Instruments. Besides FPGA configuration, remaining free flash memory can be used for user application and data storage. All four SPI data lines are connected to the FPGA allowing x1, x2 or x4 data bus widths. Maximum data rate depends on the selected bus width and clock frequency used.

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The RTC has an I2C Bus (2-wire SerialInterface) and offers temperature compensated time. The STC-Smart Temperature Compensation is calibrated in the factory and leads to a very high time-accuracy of ± 6ppm from -40°C to +85°C and ± 8ppm from -40°C to +125°C.

RTC intruppt is connected to MIO0 connected to Bank 500, pin G6.

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