...
| Page properties |
|---|
|
- Overview of Boot Mode, Reset, Enables,
|
Boot Mode
| Scroll Title |
|---|
| anchor | Table_OV_BP |
|---|
| title | Boot process. |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
Signal | FPGA Bank | Pin | B2BMIO pin | Signal State | Boot Mode |
|---|
Boot_R | 500 | E4 | J2-11 | MIO4 | Low | QSPI | | Boot_R | 500 | E4 | J2-11MIO4 | High | SD Card |
|
Reset
Zynq-7020SoC includes a reset that is driven by the reset system. Hardware resets are driven by the power-on reset signal (PS_POR_B) and the system reset signal (PS_SRST_B).
| Scroll Title |
|---|
| anchor | Table_OV_RST |
|---|
| title | Reset process. |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
Signal | FPGA Bank | Pin | B2B |
|---|
PS_POR_B | 500 | B5 | JM2-9 | | PS_SRST_B | 501 | C9 | JM2-2 |
|
...