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| Scroll Title |
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| anchor | Table_OBP_ETH |
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| title | Ethernet PHY to Zynq SoC connections |
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|
| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
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| Schematic | ETH1 | ETH2 | Pullup | Notes |
|---|
| CTREF | J3-57 | J3-25 |
| Magnetics center tap voltage | | TD+ | J3-58 | J3-28 | on-board |
| | TD- | J3-56 | J3-26 | on-board |
| | RD+ | J3-52 | J3-22 | on-board |
| | RD- | J3-50 | J3-20 | on-board |
| | LED1 | J3-55 | J3-23 | on-board |
| | LED2 | J3-53 | J3-21 | on-board |
| | LED3 | J3-51 | J3-19 | on-board |
| | POWERDOWN/INT | L21 | R20 | on-chip | It is recommended to configure FPGA I/O as input with Pullup or as output driving 1 if Interrupt not used. |
| | RESET_N | M15 | R16 | on-chip | It is recommended to configure FPGA I/O as input with Pullup or as output (active Active low PHY Reset). |
|
CAN Transceiver
Controller Area Network (CAN) transceivers are designed for use with the Texas Instruments TMS320Lx240x 3.3-V DSPs with CAN controllers. The datasheet is available in TI website. Each CAN transceiver is designed to provide differential transmit capability to the bus and differential receive capability to a CAN controller at speeds up to 1 Mbps.
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