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Signal	B2B

I/O

Note
PLL_RST	J2-89
SRST_B	J2-96	connected to PJTAG0_SRST - J16

Note

Signals, Interfaces and Pins

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FPGA Bank

B2B Connector	Interfaces	Number of I/O

Signal Count

Voltage Level

Notes

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J1	User I/O	22 singel ended, 11 Differential 8 singel ended, 4 Differential 8 singel ended, 4 Differential 8 singel ended, 4 Differential 3 singel ended	Connected to Bank 66 Connected to Bank 228 Connected to Bank 229 Connected to Bank 230 VCCO_66, PL_1V8
J2	Ethernet PHY	32 singel ended, 16 Differential 4 singel ended, 16 Differential	Connected to Bank 505 Connected to Bank 128
	Control Signals	15 single ended	PLL_SEL0, PLL_SEL1, PLL_RST, EN_GTR, EN_PL, PLL_LOLN, EN_PSGT, ERR_STATUS, ERR_OUT,SRST_B, INIT_B, PROG_B, EN_FPD , EN_LPD , DONE
	Power Control Signal	10 single ended	EN_PLL_PWR, PLL_FINC ,PG_PLL_1V8, LP_GOOD, PG_DDR, PG_PL, PG_FPD, PG_PSGT, PG_GT_R, PG_GT_L
	JTAG Interface	7 single ended	TCK, TDI, TMS, TDO, MR, Rxd, Txd
	WANNE2	2 single ended	PLL_SCL, PLL_SDA
	Clock	6 singel ended, 3 Differential	CLK0, CLK7, CLK8
J3	User I/O	12 singel ended, 6 Differential 12 singel ended, 6 Differential	Connected to Bank 48 Connected to Bank 47
	Clock	6 singel ended, 3 Differential	CLK228, CLK229, CLK230
	PJTAG Interface	7 single ended	PJTAG0_TCK, PJTAG0_TDI, PJTAG0_TMS, PJTAG0_TDO,
	MIO	27 single ended	MIO19..76
	UART	2 single ended	TXD, RXD
	Power pins	4 single ended	PS_1V8, SI_PLL_1V8, VCCO_48, VCCO_47
J4	User I/O	48 singel ended, 62 Differential 4 single ended	Connected to Bank 64 Connected to Bank 64
J4	Power pins	4 single ended	VCCO_64, VCCO65

JTAG Interface

JTAG access to the TExxxx SoM through B2B connector JMX.

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JTAG access to the TExxxx SoM through B2B connector JMX.

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JTAG Signal	B2B Connector
TMS	TDI	TDO		J2-126
TDI	J2-122
TDO	J2-124
TCK	J2-120
MR	J2-83
RXD	J3-141
TXD	J3-139	TCK	JTAG_EN

MIO Pins

Notes

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you must fill the table below with group of MIOs which are connected to a specific components or peripherals, you do not have to specify pins in B2B, Just mention which B2B is connected to MIOs. The rest is clear in the Schematic.

Example:

MIO Pin

Connected to

B2B

Notes

MIO12...14

SPI_CS , SPI_DQ0... SPI_DQ3

SPI_SCK

QSPI

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MIO Pin

Connected to

B2B

Trenz Electronic Documentation

Versions Compared

Old Version 9

New Version 10

Key

Signals, Interfaces and Pins

JTAG Interface

MIO Pins

On-board Peripherals