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The Trenz Electronic TEI0015 is an a commercial-grade, low cost and small size module integrated with Intel® MAX 10.  Intel MAX 10 devices are the ideal solution for system management, I/O expansion, communication control planes, industrial, automotive, and consumer applications.

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  • Intel® MAX 10 Commercial [10M08SAU169C8G]
    • Package: 169-UBGA
    • Speed Grade: C8 (Slowest)
    • Temperature: 0°C ~ 85°C
    • Package compatible device 10M02...10M16 as assembly variant on request possible
  • SDRAM Memory up to 64Mb, 166MHz
  • Dual High Speed USB to Multipurpose UART/FIFO IC
  • Quad SPI Flash, 64Mb
  • EEPROM Memory, 4Kb

  • 8x User LED 

  • Micro USB2

    socket 

    Receptacle 90

  • 18 Bit 2MSPS Analog to Digital Converter

  • 2x SMA Female Connector

  • I/O interface:
    • 250x GPIO
    • 116x LVDS
  • Power Supply:
    • 5V
  • Others:

    • Dimension: 86.5mm x 25mm

    • Instrumentation Amplifier

    • Differential Amplifier
    • Operational Amplifier

Block Diagram

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add drawIO object here.

Note

For more information regarding how to draw a diagram, Please refer to "Diagram Drawing Guidline" .


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  1. SMA Connector, J5...6
  2. Amplifier, U12- U14- U6
  3. Series Voltage Reference, U8
  4. Analog to Digital Convertor, U15
  5. Voltage Regulator, U10- U13- U16
  6. Switching Voltage Regulator, U11- U4
  7. Intel® MAX 10, U1
  8. SDRAM Memory, U2
  9. SPI Flash Memory, U5
  10. 12.00 MHz MEMS oscillator, U7
  11. FTDI USB2 to JTAG/UART adapter, U3
  12. User LEDs, D2...9
  13. 4Kb EEPROM, U9
  14. Configuration LED (Red) , D10
  15. Power-on LED (Green), D1
  16. Push button, S1...2
  17. Micro USB2 socket ( Receptacle), J9
  18. 1x14 pin header (Not assembled), J2
  19. 1x6 pin header (Not assembled), J4
  20. Jumper, J3
  21. 1x14 pin header (Not assembled), J1

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The FTDI chip U3 converts signals from USB2 to a variety of standard serial and parallel interfaces. Refer to the FTDI data sheet to get information about the capacity of the FT2232H chip.
FTDI FT2232H chip is used in MPPSE mode for JTAG, 6 I/O's of Channel B are routed to FPGA bank 8 of the FPGA SoC and are usable for example as GPIOs, UART or other standard interfaces.

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titleAbsolute maximum ratings

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SymbolsMinMaxUnitReference Document

VIN supply voltage (5.0V nominal)

4.755.25V
I/O Input voltage for FPGA I/O bank-0.54.12VIntel MAX 10 datasheet
Input Voltage on ADC IC U15 pins-5.05.0VAD4003BCPZ datasheet
Analog reference voltage on IC U15-0.36.0VAD4003BCPZ datasheet

Storage Temperature

-25+85°C


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Scroll Title
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titleTrenz Electronic Shop Overview

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Trenz shop TEI0015 overview page
English pageGerman page


Revision History

Hardware Revision History

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titleHardware Revision History

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DateRevisionChangesDocumentation Link
2019-02-0601-


Hardware revision number can be found on the PCB board together with the module model number separated by the dash.

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titleBoard hardware revision number.



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TODO add screenshot of the revision nu,mber


Document Change History

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  • Note this list must be only updated, if the document is online on public doc!
  • It's semi automatically, so do following

    • Add new row below first

    • Copy "Page Information Macro(date)" Macro-Preview, Metadata Version number, Author Name and description to the empty row. Important Revision number must be the same as the Wiki document revision number Update Metadata = "Page Information Macro (current-version)" Preview+1 and add Author and change description. --> this point is will be deleted on newer pdf export template

    • Metadata is only used of compatibility of older exports

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