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There is a diod (D12) which protects the board from wrong reverse polarity, Additionaly there is an Over/under voltage (IC) which protects the board from over voltage damages.
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| Scroll Title |
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| anchor | Table_PWR_PR |
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| title | Module power rails. |
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|
| Scroll Table Layout |
|---|
| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
|---|
| style | |
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| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
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| cellHighlighting | true |
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| Connector Designator | VCC / VCCIO Schematic Name | Pin | Direction | Notes |
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| J3 | 3.3V | 2,4 | Out |
| | 5V | 5 | Out |
| | J5 | 3.3V | 3 | Out |
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Bank Voltages
| Scroll Title |
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| anchor | Table_PWR_BV |
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| title | Zynq SoC bank voltages. |
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|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
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| Schematic Name | | Notes |
|---|
| Bank 1 | VCCIO1 | 3.3V |
| | Bank 2 | VCCIO2 | 3.3V |
| | Bank 3 | VCCIO3 | 3.3V |
| | Bank 4 | VCCIO4 | 3.3V |
| | Bank 5 | VCCIO5 | 3.3V |
| | Bank 6 | VCCIO6 | 3.3V |
| | Bank 7 | VCCIO7 | 3.3V |
| | Bank 8 | VCCIO8 | 3.3V |
|
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Technical Specifications
Absolute Maximum Ratings
| Scroll Title |
|---|
| anchor | Table_TS_AMR |
|---|
| title | PS absolute maximum ratings |
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|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| Symbols | Description | Min | Max | Unit | Note |
|---|
| VIN | Input supply voltage | -5.0 | 5.0 | V |
| | VCCIO | I/O buffers power supply | -0.5 | 3.75 | V |
| | VCCINT | Core voltage | -0.5 | 1.8 | V |
| | VCCD_PLL | PLL digital power supply | -0.5 | 1.8 | V |
| | VCCA | Phase-locked loop (PLL) analog power supply | -0.5 | 3.75 | V |
| | V_AN | Analog Input Voltage on ADC/DAC (U2) | -0.3 | 3.6 | V |
| | V_DIG | Digital Input Voltage on ADC/DAC (U2) | -0.3 | 3.6 | V |
| | V_REF_IN | Internal Reference Voltage Voltage on ADC/DAC (U2) | -0.3 | 3.6 | V |
| | V_REF_EX | External Reference Voltage Voltage on ADC/DAC (U2) | -0.3 | 3.6 | V |
| | T_STG | Storage Temperature | - |
65150| 85 | °C | See LTC2623WC datasheet |
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Recommended Operating Conditions
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| Scroll Title |
|---|
| anchor | Table_TS_ROC |
|---|
| title | Recommended operating conditions. |
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|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| Parameter | Min | Max | Units | Reference Document |
|---|
| VIN | 4.75 | 5.25 | V |
| | VCCIO | 3.135 | 3.465 | V | See Cyclone 10 LP datasheet. | | VCCINT | 1.15 | 1.25 | V | See Cyclone 10 LP datasheet. | | VCCD_PLL | 1.15 | 1.25 | V | See Cyclone 10 LP datasheet. | | VCCA | 2.375 | 2.625 | V | See Cyclone 10 LP datasheet. | | V_AN | 0 | 3.3 | V | See AD5592RBCPZ datasheet. | | V_DIG | 0 | 3.3 | V | See AD5592RBCPZ datasheet. | | V_REF_IN | 1 | 3 | V | See AD5592RBCPZ datasheet. | | V_REF_EX | 2.45 | 2.55 | V | See AD5592RBCPZ datasheet. | | T_OP | 0 | 85 | °C | See Cyclone 10 LP datasheet. |
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Physical Dimensions
Module size: 95 mm × 110 mm. Please download the assembly diagram for exact numbers.
- PCB thickness: 1.6 mm.
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