| FPGA Bank | Connector | I/O Signal Count | Voltage Level | Notes |
|---|
| Bank 1 | J1 (Pin header) | 8 Single ended | 3.3 V |
|
| J2 (Pin header) | 8 Single ended | 3.3 V |
|
| J4 (Pin header) | 6 Single ended | 3.3 V |
|
| Bank 2 | J3 (Pin header) | 1 Single ended | 3.3 V |
|
| P1 (PMod SMD host socket) | 8 Single ended | 3.3 V |
|
| P2 (PMod SMD host socket) | 8 Single ended | 3.3 V |
|
| J11 (VGA host Socket) | 14 Single ended | 3.3 V |
|
| Bank 6 | J5 (Grove connector) | 2 Single ended | 3.3 V |
|
| Bank 7 | P5 (PMod SMD host socket) | 8 Single ended | 3.3 V |
|
| P6 (PMod SMD host socket) | 8 Single ended | 3.3 V |
|
| Bank 8 | P3 (PMod SMD host socket) | 8 Single ended | 3.3 V |
|
| P4 (PMod SMD host socket) | 8 Single ended | 3.3 V |
|