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| Scroll Title |
|---|
| anchor | Table_OBP_USB |
|---|
| title | Micro USB-2 connector pins |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| Pins | Connected to | Note |
|---|
| VBUS | USB_VBUS | It is connected to GND | | D+ | FTDI FT2232H U3, DP pin |
| | D- | FTDI FT2232H U3, DM pin |
|
|
JTAG Interface
JTAG access to the TEI0015 SoM through pin header connector J4.
| Scroll Title |
|---|
| anchor | Table_SIP_JTG |
|---|
| title | JTAG pins connection |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
JTAG Signal | Pin Header Connector | Note |
|---|
| TMS | J4-6 |
| | TDI | J4-5 |
| | TDO | J4-4 |
| | TCK | J4-3 |
| | JTAG_EN | J4-2 | Connected to 3.3V |
|
On-board Peripherals
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| Scroll Title |
|---|
| anchor | Table_OBP_SDRAM |
|---|
| title | SDRAM interface IOs and pins |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| SDRAM I/O Signals | Signal Schematic Name | Connected to | Notes |
|---|
| Address inputs | A0 ... A13 | bank 3 | - | | Bank address inputs | BA0 / BA1 | bank 3 | - | | Data input/output | DQ0 ... DQ15 | bank 6 | - | | Data mask | DQM0 ... DQM1 | bank 6 | - | | Clock | CLK | bank 3 |
| | Control Signals | CS | bank 3 | Chip select | CKE | bank 3 | Clock enable | RAS | bank 3 | Row Address Strobe | CAS | bank 3 | Column Address Strobe | | WE | bank 3 | Write Enable |
|
FTDI FT2232H
The FTDI chip U3 converts signals from USB2 to a variety of standard serial and parallel interfaces. Refer to the FTDI data sheet to get information about the capacity of the FT2232H chip. FTDI FT2232H chip is used in MPPSE mode for JTAG, 6 I/O's of Channel B are routed to FPGA bank 8 of the FPGA SoC and are usable for example as GPIOs, UART or other standard interfaces.
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| Scroll Title |
|---|
| anchor | Table_TS_ROC |
|---|
| title | Recommended operating conditions. |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| Symbols | Min | Max | Unit | Reference Document |
|---|
VIN supply voltage (5.0V nominal) | 4.75 | 5.25 | V |
| | VCC_ONE | 3.135 | 3.456 | V | see Intel MAX 10 datasheet | | VCCIO | 3.135 | 3.456 | V | see Intel MAX 10 datasheet | | VCCA | 3.135 | 3.456 | V | see Intel MAX 10 datasheet | | V_AN_IN | -0.1 | 5.1 | V | see AD4003BCPZ datasheet | | V_REF | 2.4 | 5.1 | V | see AD4003BCPZ datasheet | T_OP | 0 | +70 | °C | W9864G6JT-6 datasheet |
|
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