...
Intel® MAX 10 Commercial [10M08SAU169C8G]
Package: UBGA-169
Speed Grade: C8 (Slowest)
Temperature: 0°C ~ to 85°C
Package compatible device 10M02...10M16 as assembly variant on request possible
SDRAM Memory up to 64Mb, 166MHz
Dual High Speed USB to Multipurpose UART/FIFO IC
64 Mb Quad SPI Flash
4Kb EEPROM Memory
8x User LED
Micro USB2 Receptacle 90
18 Bit 2MSPS Analog to Digital Converter
2x SMA Female Connector
I/O interface: 23x GPIO
Power Supply:
Dimension: 86.5mm x 25mm
Others:
...
| Scroll Title |
|---|
| anchor | Table_OV_RST |
|---|
| title | Reset process. |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
Signal | Push Button | Pin Header | Note |
|---|
RESET | S1 | J2 | connected Connected to nCONFIG |
|
Signals, Interfaces and Pins
...
| Scroll Title |
|---|
| anchor | Table_OBP |
|---|
| title | On board peripherals |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
|
...
| Scroll Title |
|---|
| anchor | Table_OBP_FTDI |
|---|
| title | FTDI chip interfaces and pins |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| FTDI Chip U3 Pin | Signal Schematic Name | Connected to | Notes |
|---|
| ADBUS0 | TCK | FPGA bank 1B, pin G2 | JTAG interface | | ADBUS1 | TDI | FPGA bank 1B, pin F5 | | ADBUS2 | TDO | FPGA bank 1B, pin F6 | | ADBUS3 | TMS | FPGA bank 1B, pin G1 | | BDBUS0 | BDBUS0 | FPGA bank 8, pin A4 | user User configurable | | BDBUS1 | BDBUS1 | FPGA bank 8, pin B4 | user User configurable | | BDBUS2 | BDBUS2 | FPGA bank 8, pin B5 | user User configurable | | BDBUS3 | BDBUS3 | FPGA bank 8, pin A6 | user User configurable | | BDBUS4 | BDBUS4 | FPGA bank 8, pin B6 | user User configurable | | BDBUS5 | BDBUS5 | FPGA bank 8, pin A7 | user User configurable |
|
SPI Flash
On-board serial configuration memory (U5) is provided by Winbond with 64 MBit (8 MByte) storage capacity. This non volatile memory is used to store initial FPGA configuration via JTAG interface. The memory is connected to FPGA bank 8 via SPI interface.
| Scroll Title |
|---|
| anchor | Table_OBP_QSPI |
|---|
| title | Quad SPI Flash memory interface |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| style | |
|---|
| widths | |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| Signal Schematic Name | Connected to | Notes |
|---|
| F_CS | FPGA bank 8, pin B3 | chip Chip select | | F_CLK | FPGA bank 8, pin A3 | clockClock | | F_DI | FPGA bank 8, pin A2 | data Data in / out | | nSTATUS | FPGA bank 8, pin C4 | data Data in / out, configuration dual-purpose pin of FPGA | | DEVCLRN | FPGA bank 8, pin B9 | data Data in / out, configuration dual-purpose pin of FPGA | | F_DO | FPGA bank 8, pin B2 | data Data in / out |
|
EEPROM
The configuration of FTDI FT2232H chip is pre-programmed on the EEPROM U9.
...