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  • Intel® Cyclone 10 LP  [10CL055YU484C8G],
    • Package: UBGA-484
    • Speed Grade: 8 (Slowest)
    • Temperature: 0 °C to 85° C
    • Package compatible device 10CL016, 10CL040, 10CL055, 10CL080 as assembly variant on request is possible
  • 16 MBit (2 MByte) flash memory Flash Memory (optional up to 32 MBit (4 MByte) possible)
  • Integrated USB 2.0 -JTAG Programmer
  • Pin Header connectorsConnectors
  • 64 MBit (8 MByte) SDRAM, up to 512 MBit (64 MByte) memory mountable
  • 64 MBit (8 MByte) User Quad-SPI Flash Memory, up to 128 MBit (16 MByte) memory mountable
  • 64 MBit HyperRAM (Pseudo SRAM), up to 128 MBit (16 MByte) memory mountable
  • 2x MAC address Address EEPROM
  • 2x Fast Ethernet PHY (10/100 Mbps)
  • 8-channelChannel, 12-bitBit, configurable ADC/DAC
  • D-Sub connectorConnector
  • 2x RJ45 connectorConnector
  • LEDs:
    • Status LEDs, Power LED
    • 13x User LEDs
    • 7-segment displaySegment Display
  • Push buttonsButtons:
    • 2x Reset Push buttonsButtons
    • 5x User Push buttonsButtons
  • I/O: X/X/X (IOs/Diff. Pairs/LVSC Pairs) → ab hier weiter
    • GPIO: 321
    • LVDS: 132
  • Power Supply: 
    • 5 V
    • Minimum 1A
  • 70 GPIO
  • 5 V Power Supply
  • Dimension: 95 mm x 110 mm
  • Others:
    • Reverse polarity of supply voltage protectionUnder/Over voltage protectionSupply Protection
    • Undervoltage/Overvoltage Protection

Block Diagram

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add drawIO object here.

Note

For more information regarding how to draw a diagram, Please refer to "Diagram Drawing Guidline" .


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Scroll Title
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titleTEI0009 block diagram


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Main Components

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titleTEI0009 main components


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  1. Barrel Power Jack, J12
  2. RJ45 socketSocket, J8...9
  3. D-Sub Connector, J11
  4. Push buttonButton (Reset), S7
  5. Grove connectorConnector, J5
  6. Under/Over Voltage ProtecterUndervoltage/Overvoltage Protector, U9
  7. 7-segment Segment LED, D11
  8. 1x6 pin headerPin Header, J4
  9. 1x8 pin headerPin Header, J2...3
  10. 8x User LEDs (Red LEDs), D2...9
  11. 8x 5x User LEDs (Red LEDs), D13...17
  12. 5x User Push buttonsButtons, S1- S3...6
  13. Red LED (CONF_DONE), D10
  14. PSRAM memoryMemory, U3
  15. SDRAM memoryMemory, U10
  16. Voltage Regulator, U5U4 - U7
  17. AD/DA ConvertorConverter, U2
  18. Pmod 2x6 SMD host socket6x Pmod Host Socket, P1...6
  19. Intel®Cyclone Intel® Cyclone 10 LP, U1
  20. Serial Configuration memoryMemory, U5
  21. 1x10 pin headerPin Header, J1
  22. EEEPROM, U15 - U18 - U20
  23. FTDI USB2 to JTAG/UART adapterConverter, U14
  24. Micro USB 2.0 (receptacle) , J10
  25. Push button Button (RST_GPIO), S2
  26. Oscillator, U22
  27. Ethernet PHY, U17 - U19
  28. QSPI Flash memoryMemory, U12

Initial Delivery State

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titleInitial delivery state of programmable devices on the module

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Storage device name

Content

Notes

QSPI Flash (U12)

Not programmed


EEPROM (U15)Programmed

FTDI configuration

SDRAMEEPROM (U18, U20)Not programmedPSRAMExcept Ethernet MAC
SDRAM (U10)Not programmedFTDI System Controller CPLD


PSRAM (U3)Not programmed
Serial Configuration Memory (U5)Programmed


Configuration Signals

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titleBoot process.

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MODE Signal State

MSEL0MSEL1MSEL2MSEL3Connected to Boot Mode

MSEL[0:3]

0100Bank 6

AS (Active Serial)

RESET pin can be set through the push button S1.



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titleReset process.

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Signal

Connected to Note

RESET

S7 (Push button)Connected to nCONFIGRST_GPIOS2 (Push button)EXT_RST

J3 (1x8 pin header)

Bank 2.


Signals, Interfaces and Pins

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titleGeneral I/O to Pin header and Pmod SMD connectors information

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FPGA BankConnector I/O Signal CountVoltage LevelNotes
Bank 1J1 (Pin header)8 Single ended3.3 V
J2 (Pin header)8 Single ended3.3 V
J4 (Pin header)6 Single ended3.3 V
Bank 2

J3 (Pin header)

1 Single ended3.3 V
P1 (PMod SMD host socketPmod Host Socket)8 Single ended3.3 V
P2 (PMod SMD host socketPmod Host Socket)8 Single ended3.3 V
J11 (VGA host Socket)14 Single ended3.3 V
Bank 6J5 (Grove connector)2 Single ended3.3 V
Bank 7P5 (PMod SMD host socketPmod Host Socket)8 Single ended3.3 V
P6 (PMod SMD host socketPmod Host Socket)8 Single ended3.3 V
Bank 8P3 (PMod SMD host socketPmod Host Socket)8 Single ended3.3 V
P4 (PMod SMD host socketPmod Host Socket)8 Single ended3.3 V

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Pmod Host Socket

TEI0009 has 6 PMod 2x6 SMD Host Socket 90° 6 Pmod 2x6 host sockets which are connected to Cyclon 10 LP (U1).

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titlePMod SMD host socket information

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DesignatorSignalsConnected to Notes
P1P1_IO1...8Bank 2
P2P2_IO1...8Bank 2
P3P3_IO1...8Bank 8
P4P4_IO1...8Bank 8
P5P5_IO1...8Bank 7
P6P6_IO1...8Bank 7

UART Interface

UART access to TEI0009 is available on 1x8 pin header J2. 

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titleUART interface information



Pin Header

TEI0009 has 5 pin headers. The pin headers J1...4 are usable for Arduino modules, too.

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titlePin Header J1


Pin Header J1SignalsConnected to Notes
J1 - 1...6D8...13Bank 1
J1 - 7GND

J1 - 8AREFADC/DAC
J1 - 9D14_SDABank 1
J1 - 10D14_SCLBank 1



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Pin Header J2SignalsConnected to Notes
J2 - 1D0_RXDBank 1
J2 - 2D1_TXDBank 1
J2 - 3...8D2...4Bank 1



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Pin Header J3SignalsConnected to Notes
J2 - 1NC-
J3 - 23.3V3.3 V
J3 - 3EXT_RSTBank 2Pulled- up to 3.3 V
J3 - 43.3V3.3 V
J3 - 55V5 V
J3 - 6...7GNDGND
J2 - 8NC-



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titlePin Header J4

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Pin Header J4SignalsConnected to Notes
J4 - 1...6AIN0...5FPGA Bank 1 and ADC/DAC



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Micro USB2.0 Connector

U14(FTDI FT2232) can be accessed through Micro USB2.0 B Receptacle 90 (J10).

3.3 V
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titleMicro USB2.0 B Receptacle 90 ° informationPin Header J5

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Pin Header J5
Schematic
SignalsConnected to 
Voltage LevelNotesUSB_VBUSGNDD-U14 (FTDI FT2232)3.3 VD+U14 (FTDI FT2232)
Notes
J5 - 1I2C_SCLFPGA Bank 6 and EEPROM (U18,U20)Pulled-up to 3.3V.
J5 - 2I2C_SDAFPGA Bank 6 and EEPROM (U18,U20)Pulled-up to 3.3V.
J5 - 33.3V3.3 V
J5 - 4GNDGND


Micro USB 2.0 Connector

FTDI FT2232 (U14) can be accessed through micro USB 2.0 B connector (J10) for JTAG (channel A). Channel B is connected to the FPGA and can be used for UART or other standards.


RJ45 Connectors

TEI0009 is equipped with two RJ45 connectors and two Ethernet PHYs. RJ45 connectors J8 and J9 are connected to Ethernet PHYs U17 and U19 respectively. .

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titleRJ45 connectors information

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PinSchematicETH1 PinETH2 PinNotes
TD+
ETH
ETH1_TX_P, ETH2_TX_PU17 - TXPU19 - TXP
CT
ETH
ETH1_CTREF_TCT, ETH2_CTREF_TCT--
Connected to GND

TD-
ETH
ETH1_TX_N, ETH2_TX_NU17 - TXMU19 - TXM
RD+
ETH
ETH1_RX_P, ETH2_RX_PU17 - RXPU19 - RXP
CT
ETH
ETH1_CTREF_RCT, ETH2_CTREF_RCT--
Connected to GND

RD-
ETH
ETH1_RX_N, ETH2_RX_NU17 - RXMU19 - RXM
LED Green
ETH
ETH1_LED0, ETH2_LED0U17 -
 NWAYEN
LED0/NWAYENU19 -
 NWAYEN
LED0/NWAYEN
LED Yellow
ETH
ETH1_LED1, ETH2_LED1U17 -
 SPEED
LED1/SPEEDU19 -
 SPEED
LED1/SPEED


D-Sub Connectors

TEI0009 is equipped with a D-Sub connector (Receptacle) which provides interface to Cyclone 10 LP through Bank 2.

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titleOn board peripherals

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Chip/InterfaceDesignatorNotes
QSPI Flash memoryU12
SDRAM memoryU10
PSRAM memoryU3
7-Segment LEDD11
FTDI FT2232U14
Ethernet PHYU17, U19
Serial Configuration MemoryU5
ADC/DACU2
EEPROMU15, U18, U20
User LEDsD2...D10, D13...D17
Push ButtonsS1...7
OscillatorsU16, U22


QSPI Flash Memory

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Notes :

Minimum and Maximum density of quad SPI flash must be mentioned for other assembly options.

There is a 64MBit (8 MByte) QSPI Flash memory (U12) provided by Winbond Integrated Silicon Solution Inc. which can be used to store data or configuration. Up to 128 MBit (16 MByte) memory is possible on other assembly option.

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titleQuad SPI interface MIOs and pins

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PinSchematicConnected to Notes
CSF_CSBank 7 
CLKF_CLKBank 7 
IO0...3F_IO0...3Bank 7 


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Notes :

Minimum and Maximum density of DDR3 SDRAM must be mentioned for other assembly options. (pay attention to supported address length for DDR3)

The TEI0009 has 256 MBit volatile provided by Winbond 64 MBit (8 MByte) volatile memory provided by Integrated Silicon Solution Inc., SDRAM IC(U10) for storing user application code and data. Up to 512 MBit (64 MByte) SDRAM is possibleon possible on other assembly option.

  • Part number:  W9864G6JTIS42S16400J-6-ND7BL

  • Supply voltage: 3.3 V

  • Clock Frequency: 166MHz143 MHz (optional up to 200 MHz)

  • Temperature: 0°C ~ 70°Cto 70°C (optional other ranges are available)

PSRAM Memory

The TEI0009 is integrated with 64Mbit 64 Mbit (8 MByte) Pseudo Static Random Access Memory (PSRAM) using a self-refresh DRAM array organized as 8M words by 8 bits. The device supports a HyperBus interface, Very Low Signal Count (Address, Command and data through 8 DQ pins), Hidden Refresh Operation, and Automotive Temperature Operation.  Up to 128 MBit (16 MByte) memory is possible on other assembly option.

  • Part number: IS66WVH8M8BLL

  • Supply voltage: 3.3 V

  • Clock Frequency: 100MHz100 MHz

  • Temperature: -40°C ~ 85°Cto 85°C (optional other ranges are available)

7-Segment

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Display

The TEI0009 has a LED 4-Digit-7-Segment - 4 Digit LED display which is connected to Bank 6.

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The FTDI chip U14 converts signals from USB2USB 2.0 to a variety of standard serial and parallel interfaces. Refer to the FTDI data sheet to get for more information about the capacity of the FT2232H chip.
Channel A of FTDI FT2232H chip is used in MPPSE mode for JTAG, 6 I/O's of . Channel B are is routed to FPGA bank 8 of the FPGA SoC and are usable for example as GPIOs, UART or 6 and is usable for other standard interfaces.

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BDBUS5
Scroll Title
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titleFTDI chip interfaces and pins

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FTDI Chip PinSignal Schematic NameConnected toNotes
ADBUS0TCKBank 1JTAG interface
ADBUS1TDIBank 1
ADBUS2TDOBank 1
ADBUS3TMS

Bank 1

BDBUS0...7BDBUS0...7Bank 6
BDBUS1BDBUS1Bank 6BDBUS2BDBUS2Bank 6BDBUS3BDBUS3Bank 6BDBUS4BDBUS4Bank 6BDBUS5

BCBUS0...7BCBUS0...7Bank 6
EECSEECSEEPROM, U15
(EEPROM)

EECLKEECLKEEPROM, U15
(EEPROM)

EEDATAEEDATAEEPROM, U15
(EEPROM)

OSCICK12M
U16 (12MHz Oscillator)
12 MHz Oscillator, U16
DMD_N
J10 (
Micro
USB2
USB 2.0
)
, J10
DPD_P
J10 (
Micro
USB2
USB 2.0
)
, J10



Serial Configuration Memory

On-board serial configuration memory (U5) is provided by Intel with 16 MBit (2 MByte) storage capacity. This non volatile memory is used to store initial FPGA configuration via JTAG interface. The memory is connected to FPGA bank 1 via active serial (AS) x1 interface.

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titleFTDI and EEPROM pin connections

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Data outData inclock
Configuration Memory PinSignal Schematic NameConnected toNotes
DATA1AS_DATA0U1, Bank 1


DATA0AS_ASDOU1, Bank 1
nCSAS_NCSnCSU1, Bank 1chip select
DCLKAS_DCLK

U1, Bank 1



Ethernet PHY

The TEI0009 is equipped with two Ethernet PHY (U17, U19, U17) which are connected to two RJ45 (J8, J9) connectors. 

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titleEthernet PHY connections and pins

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Ethernet PHY PinSignal Schematic Names (ETH1/ETH2)ETH 1ETH 2Note
TXD0...3
ETH
ETH1_TXD0...3, ETH2_TXD0...3Bank 5Bank 5
TXC
ETH
ETH1_TXC, ETH2_TXCBank 5Bank 5
TXEN
ETH
ETH1_TXEN, ETH2_TXENBank 5Bank 5
RXD0...3
ETH
ETH1_RXD0...3, ETH2_RXD0...3Bank 5Bank 5
RXC/
/
B-CAST_OFF
ETH
ETH1_RXC, ETH2_RXCBank 5Bank 5
RXER/ISO
ETH
ETH1_RXER, ETH2_RXERBank 5Bank 5
INTRP/
/NAND
nNAND_Tree
ETH
ETH1_INTRP, ETH2_INTRPBank 5

Bank 5


XI
ETH
ETH1_CLKIN, ETH2_CLKINOscillator, U22
(
Oscillator
)
, U22
(Oscillator)

MDC
ETH
ETH1_MDC, ETH2_MDCBank 5Bank 5
MDIO
ETH
ETH1_MDIO, ETH2_MDIOBank 5Bank 5
COL/CONFIG0
ETH
ETH1_COL, ETH2_COLBank 5Bank 5
CRS/CONFIG1
ETH
ETH1_CRS, ETH2_CRSBank 5Bank 5
RXDV/CONFIG2
ETH
ETH1_RXDV, ETH2_RXDVBank 5Bank 5
LED0/NWAYEN
ETH
ETH1_LED0, ETH2_LED0
Bank 5
J8B (

RJ45 - Green LED

)

Bank 5

J9B (

, J8

RJ45 - Green LED

)

, J9


LED1/SPEED
ETH
ETH1_LED1, ETH2_LED1
Bank 5
J8C (

Bank 5

J9B (

RJ45 - Yellow LED

)

, J8

RJ45 - Yellow LED

)

, J9


nRST
ETH
ETH1_RST, ETH2_RSTBank 5Bank 5
RXM
ETH
ETH1_RX_N, ETH2_RX_NRJ45, J8
(RJ45)
J9 (
RJ45
)
, J9
RXP
ETH
ETH1_RX_P, ETH2_RX_P
J8 (
RJ45
)
, J8
J9 (
RJ45
)
, J9
TXM
ETH
ETH1_TX_N, ETH2_TX_N
J8 (
RJ45
)
, J8
J9 (
RJ45
)
, J9
TXP
ETH
ETH1_TX_P, ETH2_TX_P
J8 (
RJ45
)
, J8
J9 (
RJ45
)
, J9


EEPROM

TEI0009 has three EEPROM, U15, U18 and U20. U15 is pre-programmed by for the FTDI FT2232H configuration. U18 and U19 are used for the MAC address configuration.

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titleFTDI and EEPROM pin connections

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DesignatorEEPROM PinSignal Schematic NamesConnected to Notes
U15CSEECSFTDI, U14 (FTDI)
CLK|EECLKFTDI, U14 (FTDI)
DIN/DOUTEEDATAU14 (FTDI)FTDI ConfigurationFTDI, U14



Scroll Title
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titleI2C EEPROM interface MIOs and pins

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DesignatorPinSchematicConnected to Grove HeaderNotes
U18, U20SCLI2C_SCLBank 6J5
SDAI2C_SDABank 6J5


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titleI2C address for EEPROM

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I2C AddressDesignatorNotes
0x50U18
0x520x51U20


ADC/DAC

The TEI0009 module is equipped with 12bit a 12 bit ADC/DAC (U2).

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PinsSchematicConnected toNotes

nRESET

ADDA_RSTNU1, Bank 2, U1VREF_ADC
nSYNCADDA_SYNCU1, Bank 2, U1
SCLKMCLKU1, Bank 2, U1
SDIMSDIMOSIU1, Bank 2, U1
SDOMSDOMISOU1, Bank 2, U1
VREF-AREFU1Pin Header, Bank 2J1External reference is 1 V to 3.3 V.3V  → ???
Internal reference is 2.5 V.
IO0...5AIN0...5

U1, Bank 1, U1

Pin Header, J4, Pin header



LEDs

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SchematicDesignator ColorConnected toActive LevelNote
LED1...8D2...9RedBank 3High
LED_PB1D13...17RedBank 7High
CONF_DONED10RedBank 6Low


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