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Scroll Title
anchor Table_OV_RST title Reset process.
Scroll Table Layout orientation portrait sortDirection ASC repeatTableHeaders default style widths sortByColumn 1 sortEnabled false cellHighlighting true Signal B2B Signal State Note PROG_B JM1-94 Active Low Clear FPGA configuration (falling edge) and configuration  vand initiate a new configuration

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Scroll Title
anchor Figure_PWR_PD title Power Distribution
Scroll Ignore draw.io Diagram border false viewerToolbar true fitWindow false diagramDisplayName lbox true revision 7 diagramName TEBA0714_PWR_PD simpleViewer false width links auto tbstyle hidden diagramWidth 640 Scroll Only

Power-On Sequence

There is no specific power-on sequence, after power up the module and carrier will be powered on.

Scroll Title
anchor Figure_PWR_PS title Power Sequency
Scroll Ignore draw.io Diagram border false viewerToolbar true fitWindow false diagramDisplayName lbox true revision 3 diagramName TEBA0714_PWR_PS simpleViewer false width links auto tbstyle hidden diagramWidth 640 Scroll Only

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Scroll Title
anchor Table_PWR_PR title Module power rails.
Scroll Table Layout orientation portrait sortDirection ASC repeatTableHeaders default style widths sortByColumn 1 sortEnabled false cellHighlighting true Power Rail Name B2B ConnectorJM1 Connector JM1 Pin B2B ConnectorJM2 Connector JM2 Pin Direction Notes 3.3V 99,97 - Input 1.8V - 18 Input 3.3V_OUT 83 54 Output Comes from Module VCCIO34 61 - Input V_CFG0 53 - Input

Board to Board Connectors

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