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Scroll Title |
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anchor | Figure_OV_BD |
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title | TEF0003 block diagram |
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Scroll Ignore |
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draw.io Diagram |
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border | false |
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viewerToolbar | true |
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fitWindow | false |
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diagramDisplayName | |
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lbox | true |
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revision | 5 |
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diagramName | TEF0003_OV_BD |
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simpleViewer | false |
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width | |
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links | auto |
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tbstyle | hidden |
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diagramWidth | 641 |
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Scroll Only |
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Image Modified
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Main Components
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Scroll Title |
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anchor | Table_OV_BP |
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title | Boot process. |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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MODE Signal State M[2:0] | Boot Mode |
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110 | Master SPI |
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Scroll Title |
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anchor | Table_OV_RST |
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title | Reset process. |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Signal | B2B | I/O | Note |
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MUX_RESET | - | - |
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Signals, Interfaces and Pins
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Scroll Title |
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anchor | Table_SIP_B2B |
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title | General PL I/O to B2B connectors information |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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B2B Connector Designator | I/O Signal Count | Voltage Level | Notes |
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Artix 7, U1 | 14 | J1 |
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| 15 | J1 |
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| 16 | J1 |
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| 34 | J1 |
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| Lattice MachXO, U | 0 | J6 |
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| 1 | J6 |
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| 2 | J6 |
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| 3 | J6 |
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JTAG Interface
JTAG access to the TExxxx SoM through B2B connector JMX.
Scroll Title |
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anchor | Table_SIP_JTG |
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title | JTAG pins connection |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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JTAG Signal | B2B Connector |
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TMS | J1 | TDI | J1 | TDO | J1 | TCK | J1 | JTAG_EN | J1 |
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MIO Pins
Page properties |
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you must fill the table below with group of MIOs which are connected to a specific components or peripherals, you do not have to specify pins in B2B, Just mention which B2B is connected to MIOs. The rest is clear in the Schematic. Example: MIO Pin | Connected to | B2B | Notes |
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MIO12...14 | SPI_CS , SPI_DQ0... SPI_DQ3 SPI_SCK | J2 | QSPI |
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Scroll Title |
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anchor | Table_OBP |
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title | On board peripherals |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Chip/Interface | Designator | Notes |
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EEPROM |
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| Clock Generator |
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| Oscillator |
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| SPI Flash |
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Quad SPI Flash Memory
Page properties |
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Notes : Minimum and Maximum density of quad SPI flash must be mentioned for other assembly options. |
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Scroll Title |
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anchor | Table_OBP_SPI |
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title | Quad SPI interface MIOs and pins |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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MIO Pin | Schematic | U?? Pin | Notes |
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EEPROM
Scroll Title |
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anchor | Table_OBP_RTCEEP |
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title | I2C EEPROM interface MIOs and pins |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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MIO Pin | Schematic | U?? Pin | Notes |
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Scroll Title |
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anchor | Table_OBP_I2C_RTCEEPROM |
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title | I2C Address address for RTCEEPROM |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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MIO Pin | I2C Address | Designator | Notes |
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Ethernet
Scroll Title |
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anchor | Table_OBP_EEPETH |
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title | I2C EEPROM interface MIOs and pinsEthernet PHY to Zynq SoC connections |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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| MIO Pin | Schematic | U?? Pin | NotesBank | Signal Name | ETH1 | ETH2 | Signal Description |
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Clock Sources
Scroll Title |
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anchor | Table_OBP_I2C_EEPROMCLK |
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title | I2C address for EEPROMOsillators |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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MIO Pin | I2C Address | Designator | Notes |
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LEDs
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anchor | Table_OBP_LED |
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title | On-board LEDs |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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DDR3 SDRAM
Page properties |
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Notes : Minimum and Maximum density of DDR3 SDRAM must be mentioned for other assembly options. (pay attention to supported address length for DDR3) |
The TE???? SoM has ??? GByte volatile DDR3 SDRAM IC for storing user application code and data.
- Part number:
- Supply voltage:
- Speed:
- NOR Flash
- Temperature:
Ethernet
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anchor | Table_OBP_ETH |
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title | Ethernet PHY to Zynq SoC connections |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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CAN Transceiver
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anchor | Table_OBP_CAN |
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title | CAN Tranciever interface MIOs |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Scroll Title |
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anchor | Table_OBP_CLK |
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title | Osillators |
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Scroll Table Layout |
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orientation | portrait |
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sortDirection | ASC |
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repeatTableHeaders | default |
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sortByColumn | 1 |
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sortEnabled | false |
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cellHighlighting | true |
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Designator | Description | Frequency | Note |
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U4 | Oscillator, 25 MHz | MHz |
| U10 | Programmable Clock Generator | MHzKHz |
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Power and Power-On Sequence
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