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| Scroll Title |
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| anchor | Table_SIP_B2B |
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| title | General PL I/O to B2B connectors information |
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|
| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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|
| FPGA | FPGA Bank | Connector Designator | I/O Signal Count | Voltage Level | Notes |
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| Artix 7, U1 | 1416 | J1 | 15 | J1 | 16 | J1 | 34 | J1J1B | 68 Single Ended, 34 | 1.8V |
| | 35 | J6B | 68 Single Ended, 34 | 1.8V |
| | Lattice MachXO, U | 0 | J6 | 1 | J6 | 2 | J6 | 3 | J6 | J1F | 4 Single Ended | 3.3V |
| | 0 | J6F | 4 Single Ended | 3.3V |
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JTAG Interface
JTAG access to the TExxxx SoM through B2B connector JMXTEF0003 FMC through Vita 57 connector J6.
| Scroll Title |
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| anchor | Table_SIP_JTG |
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| title | JTAG pins connection |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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JTAG Signal | B2B Connector |
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| FMC_TMS | J1J6F-TCK | | FMC_TDI_TOP | J6F-J1-TDI | | FMC_TDO_TOP | J1J6F-TDO | | FMC_TCK | J1 | JTAG_EN | J1J6F-TCK | | JTAGEN | J7 |
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MIO Pins
| Page properties |
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|
you must fill the table below with group of MIOs which are connected to a specific components or peripherals, you do not have to specify pins in B2B, Just mention which B2B is connected to MIOs. The rest is clear in the Schematic. Example: | MIO Pin | Connected to | B2B | Notes |
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| MIO12...14 | SPI_CS , SPI_DQ0... SPI_DQ3 SPI_SCK | J2 | QSPI |
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| Scroll Title |
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| anchor | Table_OBP |
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| title | On board peripherals |
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|
| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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|
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Quad SPI Flash Memory
| Page properties |
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Notes : Minimum and Maximum density of quad SPI flash must be mentioned for other assembly options. |
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| Scroll Title |
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| anchor | Table_OBP_SPI |
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| title | Quad SPI interface MIOs and pins |
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|
| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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|
MIO Pin| Schematic | U?? U11 Pin | Notes |
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| SPI-CS | CS |
| | SPI-CLK | CLK |
| | SPI-DQO | DI/IO0 |
| | NLSPI0DQ3 | HOLD/IO3 |
| | SPI-DQ2 | WP/IO2 |
| | SPI-DQ1 | DO/IO1 |
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EEPROM
| Scroll Title |
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| anchor | Table_OBP_EEP |
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| title | I2C EEPROM interface MIOs and pins |
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|
| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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| MIO PinVita 57 Connector | Schematic | U?? Pin | Notes |
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|
| Scroll Title |
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| anchor | Table_OBP_I2C_EEPROM |
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| title | I2C address for EEPROM |
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|
| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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|
| MIO Pin | I2C Address | Designator | Notes |
|---|
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| U4 Pin | Notes |
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| J1F-SCL | FMC_SCL | SCL |
| | J1F-SDA | FMC_SDA | SDA |
| | J1F-GA0 | GA0 | A0 |
| | J1F-GA1 | GA1 | A1 |
|
|
| Scroll Title |
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| anchor | Table_OBP_I2C_ETHEEPROM |
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| title | Ethernet PHY to Zynq SoC connectionsI2C address for EEPROM |
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|
| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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BankSignal NameETH1ETH2Signal Description
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Clock Sources
| Scroll Title |
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| anchor | Table_OBP_CLK |
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| title | Osillators |
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|
| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| sortByColumn | 1 |
|---|
| sortEnabled | false |
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| cellHighlighting | true |
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|
| Designator | Description | Frequency | Note |
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| U4 | Oscillator, 25 MHz | MHz |
| | U10 | Programmable Clock Generator | MHz |
|
|
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Power supply with minimum current capability of xx 3 A for system startup is recommended.
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