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Notes :

  • For carrier or stand-alone boards use subsection for every connector type (add designator on description, not on the subsection title), for example:
    • SD
    • USB
    • ETH
    • FMC
    • ...
  • For modules which needs carrier use only classes and refer to B2B connector if more than one is used, for example
    • JTAG
    • UART
    • I2C
    • MGT
    • ...

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FMC Connectors

FPGA bank number and number of I/O signals connected to the B2B connector:FMC Connectors J1 and J6 which are located on top and bottom of the board.

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FPGAFPGA BankConnector DesignatorI/O Signal CountVoltage LevelNotes
Artix 7, U116J1B68 Single Ended, 34 Differential1.8V
35J6B68 Single Ended, 34 Differential1.8V
Lattice MachXO, U0J1F4 Single Ended 3.3VCPLD
0J6F4 Single Ended 3.3VCPLD



JTAG Interface

The Lattice MachXO (U15) is available to meet the requirement of a CPLD, JTAG access to the MachXO is available through FMC Adapter J6. JTAG access to the Artix 7(U1) is available via MachXO, Bank 2.

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titleRecommended operating conditions.

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ParameterMinMaxUnitsReference Document
12V1212V
T_OPR-4085°CSee Xilinx ???? See MT25QU512ABB8E12-0SIT (U9)  datasheet.


Physical Dimensions

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