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TEF0003 is equipped with a 512Mb Serial NOR Flash (x1/x2/x4) which is provided to store an application on in the SPI Flash memory in order to boot the module. The SPI Flash data is connected to Artix 7 FPGBA via FPGA Bank 14.
| Scroll Title |
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| anchor | Table_OBP_SPI |
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| title | Quad SPI interface MIOs and pins |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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| Schematic | U9 Pin | Notes |
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| SPI-CS | CS |
| | SPI-CLK | CLK |
| | SPI-DQO | DI/IO0 |
| | SPI_DQ3 | HOLD/IO3 |
| | SPI-DQ2 | WP/IO2 |
| | SPI-DQ1 | DO/IO1 |
| | 1.8V | VCC |
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EEPROM
A Microchip 24LC128-I/LC microchip serial EEPROM (U4) is provided for IPMI data. It is accessible via the LPC FMC connector J1 (SCL, SDA).
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| Scroll Title |
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| anchor | Table_PWR_BV |
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| title | Zynq SoC bank voltages. |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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| Schematic Name | | Notes |
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| Bank 13 | VCCO_13 | 1.8 V |
| | Bank 14 | VCCO_14 | 1.8 V |
| | Bank 15 | VCCO_15 | 1.8 V |
| | Bank 16 | VCCO_16 | VADJ | 1.8 V | | Bank 34 | VCCO_34 | 1.8 V |
| | Bank 3435 | VCCO_35 | VADJ | 1.8 V | | Bank 0 | VCCO_0 | 1.8 V |
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Board to Board Connectors
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