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changes.mady.by.user Pedram Babakhani

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Table of Contents

Table of Contents

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  • SoC/FPGA
    • Package: SFVC784
    • Device: ZU2 ...ZU5, *
    • Engine:  EG, CG, EV, *
    • Speed: -1, -1L, -2, -2L, 3, *, **
    • Temperature: I, E, *, **
  • RAM/Storage
    • 2x  DDR4 SDRAM,
      • Data Width: 16 Bit
      • Size: 8 Gb, *
      • Speed: 2400 Mbps, ***
    • 2x QSPI boot Flash in dual parallel mode
      • Data Width: 8 Bit
      • Size: 512 Mb Gb, *
    • 1x e.MMC Memory
      • Data Width: 16 Bit
      • Size: 8 Gb, *
    • MAC address serial EEPROM
  • On Board
    • Lattice MachXO2 CPLD
    • Programmable Clock Generator
    • Hi-speed USB2 ULPI Transceiver
    • 4x LEDS
  • Interface
    • 1 GB/s serial GMII Gbps RGMII Ethernet interface
    • Hi-speed USB2 ULPI transceiver with full OTG support
    • Graphic Processor Mali-400 MP2, *
    • 34 156 x High Performance (HP) und 96 x High Density PL I/Os
    • 4 x serial PS GTR transceivers
      • PCI Express interface version 2.1 compliant
      • SATA 3.1 specification compliant interface

      • DisplayPort source-only interface with video resolution up to 4k x 2k

      • 2x USB 3.0 specification compliant interface implementing a 5 Gbit/s line rate
  • Power
    • All power regulators on board
  • Dimension
    • 40 x 50 mm
  • Note
    • * depends on assembly version
    • ** also non low power assembly options possible
    • *** depends on used U+ Zynq and DDR4 combination
    • Rugged for shock and high vibration

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titleTE0821 block diagram


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Main Components

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titleTE0821 main components


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  1. Xilinx Zynq ZYNQ UltraScale+ XCZU3EGMPSoC, U1
  2. Red LED (ERR_OUT), D3
  3. Green LED (ERR_STATUS), D4
  4. Red LED (DONE), D1
  5. 10/100/1000 Mbps energy efficient ethernet transceiverEnergy Efficient Ethernet Transceiver, U8
  6. 8Gb DDR4, U2-U3
  7. 512 Mbit QSPI flash memory, U7-U17
  8. Green User LED, D2
  9. B2B connector Samtec Razor Beam, JM1
  10. Programmable clock generator, U10
  11. USB2.0 Transceiver,  U18
  12. B2B connector Samtec Razor Beam, JM3
  13. B2B connector Samtec Razor Beam, JM2
  14. 8 GByte eMMC memory, U6
  15. Lattice Semiconductor MachXO2 System Controller CPLD, U21

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titleInitial delivery state of programmable devices on the module

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Storage device name

Content

Notes

Dual QSPI Flash Memory

Not programmed


eMMC Memory

Not programmed


DDR4 SDRAMNot programmed
Programmable Clock GeneratorNot programmed
CPLD (LCMXO2-256HC)ProgrammedTE0821 CPLD


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titleBoot process.

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MODE Pin

Boot Mode
LowHigh

QSPI*

HighLowSD Card*


*changable also with other CPLD Firmware: Please refer to the TE0821 CPLD.


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titleReset process.

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Signal

B2BI/ONote

EN

JM1-28InputCPLD Enable Pin


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titleGeneral PL I/O to B2B connectors information

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FPGA BankTypeB2B ConnectorI/O Signal CountVoltage LevelNotes
24HDJM224x I/O, 12x  LVDS PairsVariable Max voltage 3.3V
25HDJM1

24x I/O, 12x  LVDS Pairs

Variable Max voltage 3.3V
26HDJM124x I/O, 12x  LVDS PairsVariable Max voltage 3.3V
44HDJM224x I/O, 12x  LVDS PairsVariableMax voltage 3.3V
65

HP

JM2

18x I/O, 9x LVDS Pairs

VariableMax voltage 1.8V

65

HP

JM3

16x I/O, 8x LVDS Pairs

Variable

Max voltage 1.8V
505GTRJM316x I/O, 8x LVDS Pairs-4x lanes
505GTR CLKJM31x Diff Clock-

501

MIO

JM1

15 I/O

3.3V



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titleTest Points Information

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Test PointSignalConnected toNotes
1I2C_SCLEEPROM, U25
2I2C_SDAEEPROM, U25
3SRST_BFPGA Bank 503PSCONFIG
4PS_CLKFPGA Bank 503PSCONFIG
5PROG_BFPGA Bank 503PSCONFIG
6INIT_BFPGA Bank 503PSCONFIG
7DONERed LED, D1
8PS_LP0V85Voltage Regulator, U12
9DDR_2V5Voltage Regulator, U4
10PS_AVCCVoltage Regulator, U9
11DDR_1V2Voltage Regulator, U15
12PS_AVTTVoltage Regulator, U3U13
13PS_FP0V85Voltage Regulator, U26
14POR_BVoltage Translator, U19
15PS_PLLVoltage Regulator, U23
16PL_VCCINTVoltage Regulator, U5


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titleOn board peripherals

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Chip/InterfaceDesignatorNotes
QSPI FlashU7, U17
90997425EEPROMU25
DDR4 SDRAMU2,U3
GigaBit EthernetU8
USB2.0 TransceiverU18
eMMC MemoryU6
OscillatorsU32, U14, U11
Programmable Clock GeneratorU10
CPLDU21
90997425LEDsD1...3


Quad SPI Flash Memory

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titleZynq SoC bank voltages.

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FPGA BankSchematicVoltageNote
Bank 24 HDVCCO_HD24_2444Variable Max voltage 3.3V
Bank 25 HDVCCO_HD25_26Variable Max voltage 3.3V
Bank 26 HDVCCO_HD25_26Variable Max voltage 3.3V
Bank 44 HDVCCO_HD24_44VariableMax voltage 3.3V
Bank 64 HPVCCO_64N.CNot Connected
Bank 65 HP

VCCO_65

VariableMax voltage 1.8V
Bank 66 HPVCCO_661.8V
Bank 500 PSMIOVCCO_PSIO0_5001.8V

Bank 501 PSMIO

VCCO_PSIO1_501

3.3V


Bank 502 PSMIOVCCO_PSIO2_5021.8V
Bank 503 PSCONFIGVCCO_PSIO3_5031.8V
Bank 504 PSDDRDDR_1V21.2V


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  • This section is optional and only for modules.

  • use "include page" macro and link to the general B2B connector page of the module series,

    For example: 6 x 6 SoM LSHM B2B Connectors

    Include Page
    PD:6 x 6 SoM LSHM B2B ConnectorsPD:
    6 x 6 SoM LSHM B2B Connectors

Include Page
PD:4 x 5 SoM LSHM B2B ConnectorsPD:
4 x 5 SoM LSHM B2B Connectors

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titlePS absolute maximum ratings

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DescriptionMinMaxUnitNotes

VIN supply voltage

-0.3

7

V

See EN6347QI and TPS82085SIL datasheets
3.3VIN supply voltage-0.13.630VXilinx DS925 and TPS27082L datasheet
PS I/O supply voltage, VCCO_PSIO-0.53.630VXilinx document DS925
PS I/O input voltage-0.5VCCO_PSIO + 0.55VXilinx document DS925
HP I/O bank supply voltage, VCCO-0.52.0VXilinx document DS925
HP I/O bank input voltage-0.55VCCO + 0.55VXilinx document DS925
HD I/O bank supply voltage, VCCO-0.53.4VXilinx document DS925
HD I/O bank input voltage-0.55VCCO + 0.55VXilinx document DS925
PS GTR reference clocks absolute input voltage-0.51.1VXilinx document DS925
PS GTR absolute input voltage-0.51.1VXilinx document DS925

Voltage on SC CPLD pins

-0.5

3.75

V

Lattice Semiconductor MachXO2 datasheet

Storage temperature

-40

+85

°C

See eMMC datasheet


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titleBoard hardware revision number.


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Document Change History

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DateRevisionContributorDescription

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  • bugfix boot mode

2021-07-05v.61John Hartfiel

  • Update download Link

  • Update Change history
2021-06-07v.59Vadim Yunitski
  • Added missing text in Bank Voltages
  • Fixed typo in Bank Voltages
2020-07-15v.50Pedram Babakhani
  • Initial Release

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