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| Page properties |
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Note for Download Link of the Scroll ignore macro: |
| Scroll pdf ignore |
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Table of Contents |
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| Scroll Title |
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| anchor | Figure_OV_BD |
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| title | TE0821 block diagram |
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e| draw.io Diagram |
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| border | false |
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| diagramName | TE0821_OV_BD |
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| simpleViewer | false |
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| width | |
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| links | auto |
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| tbstyle | hidden |
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| diagramDisplayName | |
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| lbox | true |
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| diagramWidth | 641 |
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| revision | 1819 |
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Main Components
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| Scroll Title |
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| anchor | Table_OV_IDS |
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| title | Initial delivery state of programmable devices on the module |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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Storage device name | Content | Notes |
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Dual QSPI Flash Memory | Not programmed |
| eMMC Memory | Not programmed |
| | DDR4 SDRAM | Not programmed |
| | Programmable Clock Generator | Not programmed |
| | CPLD (LCMXO2-256HC) | Programmed | TE0821 CPLD |
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| Scroll Title |
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| anchor | Table_OV_BP |
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| title | Boot process. |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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MODE Pin | Boot Mode |
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| LowHigh | QSPI* | | HighLow | SD Card* |
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*changable also with other CPLD Firmware: Please refer to the TE0821 CPLD.
| Scroll Title |
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| anchor | Table_OV_RST |
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| title | Reset process. |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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Signal | B2B | I/O | Note |
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EN | JM1-28 | Input | CPLD Enable Pin |
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| Scroll Title |
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| anchor | Table_SIP_TPs |
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| title | Test Points Information |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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| Test Point | Signal | Connected to | Notes |
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| 1 | I2C_SCL | EEPROM, U25 |
| | 2 | I2C_SDA | EEPROM, U25 |
| | 3 | SRST_B | FPGA Bank 503 | PSCONFIG | | 4 | PS_CLK | FPGA Bank 503 | PSCONFIG | | 5 | PROG_B | FPGA Bank 503 | PSCONFIG | | 6 | INIT_B | FPGA Bank 503 | PSCONFIG | | 7 | DONE | Red LED, D1 |
| | 8 | PS_LP0V85 | Voltage Regulator, U12 |
| | 9 | DDR_2V5 | Voltage Regulator, U4 |
| | 10 | PS_AVCC | Voltage Regulator, U9 |
| | 11 | DDR_1V2 | Voltage Regulator, U15 |
| | 12 | PS_AVTT | Voltage Regulator, U3U13 |
| | 13 | PS_FP0V85 | Voltage Regulator, U26 |
| | 14 | POR_B | Voltage Translator, U19 |
| | 15 | PS_PLL | Voltage Regulator, U23 |
| | 16 | PL_VCCINT | Voltage Regulator, U5 |
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| Scroll Title |
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| anchor | Table_OBP |
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| title | On board peripherals |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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Quad SPI Flash Memory
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| Scroll Title |
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| anchor | Table_PWR_BV |
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| title | Zynq SoC bank voltages. |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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| FPGA Bank | Schematic | Voltage | Note |
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| Bank 24 HD | VCCO_HD24_2444 | Variable | Max voltage 3.3V | | Bank 25 HD | VCCO_HD25_26 | Variable | Max voltage 3.3V | | Bank 26 HD | VCCO_HD25_26 | Variable | Max voltage 3.3V | | Bank 44 HD | VCCO_HD24_44 | Variable | Max voltage 3.3V | | Bank 64 HP | VCCO_64 | N.C | Not Connected | | Bank 65 HP | VCCO_65 | Variable | Max voltage 1.8V | | Bank 66 HP | VCCO_66 | 1.8V |
| | Bank 500 PSMIO | VCCO_PSIO0_500 | 1.8V |
| Bank 501 PSMIO | VCCO_PSIO1_501 | 3.3V |
| | Bank 502 PSMIO | VCCO_PSIO2_502 | 1.8V |
| | Bank 503 PSCONFIG | VCCO_PSIO3_503 | 1.8V |
| | Bank 504 PSDDR | DDR_1V2 | 1.2V |
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| Page properties |
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- This section is optional and only for modules.
use "include page" macro and link to the general B2B connector page of the module series, For example: 6 x 6 SoM LSHM B2B Connectors
| Include Page |
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| PD:6 x 6 SoM LSHM B2B ConnectorsPD: |
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| 6 x 6 SoM LSHM B2B Connectors |
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| Include Page |
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| PD:4 x 5 SoM LSHM B2B ConnectorsPD: |
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| 4 x 5 SoM LSHM B2B Connectors |
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| Scroll Title |
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| anchor | Table_TS_AMR |
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| title | PS absolute maximum ratings |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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| Description | Min | Max | Unit | Notes |
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VIN supply voltage | -0.3 | 7 | V | See EN6347QI and TPS82085SIL datasheets | | 3.3VIN supply voltage | -0.1 | 3.630 | V | Xilinx DS925 and TPS27082L datasheet | | PS I/O supply voltage, VCCO_PSIO | -0.5 | 3.630 | V | Xilinx document DS925 | | PS I/O input voltage | -0.5 | VCCO_PSIO + 0.55 | V | Xilinx document DS925 | | HP I/O bank supply voltage, VCCO | -0.5 | 2.0 | V | Xilinx document DS925 | | HP I/O bank input voltage | -0.55 | VCCO + 0.55 | V | Xilinx document DS925 | | HD I/O bank supply voltage, VCCO | -0.5 | 3.4 | V | Xilinx document DS925 | | HD I/O bank input voltage | -0.55 | VCCO + 0.55 | V | Xilinx document DS925 | | PS GTR reference clocks absolute input voltage | -0.5 | 1.1 | V | Xilinx document DS925 | | PS GTR absolute input voltage | -0.5 | 1.1 | V | Xilinx document DS925 | Voltage on SC CPLD pins | -0.5 | 3.75 | V | Lattice Semiconductor MachXO2 datasheet | Storage temperature | -40 | +85 | °C | See eMMC datasheet |
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| Scroll Title |
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| anchor | Figure_RV_HRN |
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| title | Board hardware revision number. |
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| Scroll Ignore |
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| draw.io Diagram |
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| border | false |
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| diagramName | TE0821_RV_HRN |
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| simpleViewer | false |
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| width | |
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| links | auto |
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| tbstyle | hidden |
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| diagramDisplayName | |
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| lbox | true |
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| diagramWidth | 326 |
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| revision | 34 |
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| Scroll Only |
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Document Change History
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| Scroll Title |
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| anchor | Table_RH_DCH |
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| title | Document change history. |
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| Scroll Table Layout |
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| orientation | portrait |
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| sortDirection | ASC |
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| repeatTableHeaders | default |
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| style | |
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| widths | |
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| sortByColumn | 1 |
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| sortEnabled | false |
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| cellHighlighting | true |
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| Date | Revision | Contributor | Description |
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| Page info |
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| infoType | Modified date |
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| dateFormat | yyyy-MM-dd |
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| type | Flat |
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| | Page info |
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| infoType | Current version |
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| prefix | v. |
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| type | Flat |
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| showVersions | false |
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| | Page info |
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| infoType | Modified by |
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| type | Flat |
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| showVersions | false |
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| | | 2021-07-05 | v.61 | John Hartfiel | Update download Link - Update Change history
| | 2021-06-07 | v.59 | Vadim Yunitski | | | 2020-07-15 | v.50 | Pedram Babakhani | | -- | all | | Page info |
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| infoType | Modified users |
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| type | Flat |
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| showVersions | false |
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