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| Scroll Title |
|---|
| anchor | Table_SIP_FMC |
|---|
| title | General PL I/O to FMC Connectors information |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| FPGA | FPGA Bank | Connector Designator | I/O Signal Count | Voltage Level | Notes |
|---|
| Artix 7, U1 | 16 | J1B | 68 Single Ended, 34 Differential | 1.8V |
| | 35 | J6B | 68 Single Ended, 34 Differential | 1.8V |
| | Lattice MachXO, U | 0 | J1F | 4 Single Ended | 3.3V | CPLD | | 0 | J6F | 4 Single Ended | 3.3V | CPLD |
|
Coaxial Connectors
| Scroll Title |
|---|
| anchor | Table_SIP_Coaxial |
|---|
| title | Coaxial Connectors information |
|---|
|
| Scroll Table Layout |
|---|
| orientation | portrait |
|---|
| sortDirection | ASC |
|---|
| repeatTableHeaders | default |
|---|
| sortByColumn | 1 |
|---|
| sortEnabled | false |
|---|
| cellHighlighting | true |
|---|
|
| Designator | Schematic | Connected to | Notes |
|---|
| J2 | GA_OUT | Serializer, U5 | Output Serializer | | J3 | GB_OUT | Serializer, U6 | Output Serializer | | J4 | GC_OUT | Serializer, U7 | Output Serializer |
| GD_OUT | Serializer, U8 | Output Serializer |
|
JTAG Interface
The Lattice MachXO (U15) is available to meet the requirement of a CPLD, JTAG access to the MachXO is available through FMC Adapter J6. JTAG access to the Artix 7(U1) is available via MachXO, Bank 2.
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