Page History

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 - Intel® SoC FPGA Embedded Development Suite (SoC EDS) - Version 18.1 build 625
    Erweiterung von Quartus Prime

 - Linux Installation - As OS or as a Virtual Machine - Windows Subsystem for Linux is not suitable

Introduction

This write-up is intended to guide customers / users in their first steps in
BLABLA → Nutzer dabei zu Unterstützen eigene Designs für das Board zu entwickeln / Die Möglichkeiten / Ideen umzusetzen...

Users who intend to expand the hardware Fähigkeiten des Boards Änderungen des Bootprozesses ODER einfach nur einen
tieferen Einblick / leichten Einstieg in die Nutzung der Entwicklungsumgebung haben wollen..

Wird gezeigt, am BEISPIEL DER HARD

A detailed Insight into the

Page 1 - Intel Quartus Project

Begin -
Setup a project in Quartus, use the Plattform Designer to generate interconnection logic for the plattform / your design

Goal -
Compile the project to get the required files and folders in the next steps
[plattformDesigner.sopinfo file and (hps_isw_)handoff folder]

Page 2 - Generation of the pre and main bootloader / u-boot

Use the handoff folder to generate the preloader and main bootloader

[preloader-mkpimage.bin u-boot.img]

Page 3 - Generation of the Device Tree Blob

Use the plattformDesigner.sopinfo file to generate the device tree
[dts and dtb]

Page 4 - SD card setup for Intel Cyclone 5 HPS - EXISTIERT BEREITS

Web sources:

Embedded Linux Beginners Guide
https://rocketboards.org/foswiki/Documentation/EmbeddedLinuxBeginnerSGuide

Introducing the Intel® Quartus® Prime Pro and Standard Edition Software User Guides
https://www.intel.com/content/www/us/en/programmable/products/design-software/fpga-design/quartus-prime/user-guides.html

Intel SoC FPGA Embedded Development Suite User Guide
https://www.intel.com/content/www/us/en/programmable/documentation/lro1402536290550.html

Intel® Soc EDS Support
https://www.intel.de/content/www/de/de/programmable/products/design-software/embedded-software-developers/soc-eds/support.html

Embedded Peripherals IP User Guide
https://www.intel.com/content/www/us/en/programmable/documentation/sfo1400787952932.html

SoC HPS System Generation
https://www.youtube.com/watch?v=8BehnPg8IvM
https://www.youtube.com/watch?v=L8FMSy7Uxjc
https://www.youtube.com/watch?v=vS7pvefsbRM

U-Boot

HPS SoC Boot Guide - Cyclone V SoC Development Kit
https://www.intel.com/content/www/us/en/programmable/documentation/lro1404103165481.html

Generating and Compiling the Preloader
https://rocketboards.org/foswiki/Documentation/AVGSRDPreloader

Building Bootloader
https://rocketboards.org/foswiki/Documentation/BuildingBootloader

Preloader and U-Boot Customization - v13.1
https://rocketboards.org/foswiki/Documentation/PreloaderUbootCustomization131

U-Boot programming: A tutorial -- Part I to III
http://xillybus.com/tutorials/uboot-hacking-howto-1

DTB

Device Tree Generation
https://rocketboards.org/foswiki/Documentation/DeviceTreeGenerator140

Introduction

This write-up is intended to guide customers / users in their first steps in
BLABLA → Nutzer dabei zu Unterstützen eigene Designs für das Board zu entwickeln / Die Möglichkeiten / Ideen umzusetzen...

Users who intend to expand the hardware Fähigkeiten des Boards Änderungen des Bootprozesses ODER einfach nur einen
tieferen Einblick / leichten Einstieg in die Nutzung der Entwicklungsumgebung haben wollen..

Wird gezeigt, am BEISPIEL DER HARD

A detailed Insight into the

Page 1 - Intel Quartus Project

Begin -
Setup a project in Quartus, use the Plattform Designer to generate interconnection logic for the plattform / your design

Goal -
Compile the project to get the required files and folders in the next steps
[plattformDesigner.sopinfo file and (hps_isw_)handoff folder]

Page 2 - Generation of the pre and main bootloader / u-boot

Use the handoff folder to generate the preloader and main bootloader

[preloader-mkpimage.bin u-boot.img]

Page 3 - Generation of the Device Tree Blob

Use the plattformDesigner.sopinfo file to generate the device tree
[dts and dtb]

...