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Introduction

Bringing-up SoC boards can be board dependent. Therefore, an overview introducing into the basic requirements to bring-up the board TEI0022 could be very helpful. To reach this goal this guide shows users with basic knowledge of computers, basic ideas of FPGAs, and Software Design Tools,
a detailed insight into the required steps to create the necessary files for booting the Hard Processor System (HPS) of an Intel Cyclone V SoC from an SD card.

The whole design process needs several tools, whereby output files and folders from one step are essential for the next processing step. Therefore, each step can be handled independently with its complexity. The usage of tools will be described in sequential order, according to the necessary path, booting the HPS. This process is described by showing the requirements in the next section. The following section displays the necessary steps withing the tool "Intel Quartus Project" (Step 1). After that, the generation of the preloader and the main bootloader from u-boot sources (Step 2) is shown, followed by the generation of the device tree blob (Step 3). Then, the SD card setup for the Intel Cycone V HPS (Step 4) is delivered and finally, references for further information are mentioned.

Requirements

The requirements for bring-up the HPS in the Intel Cyclone V SoC consists of the following tools:

• Intel® Quartus® Prime Lite - Version 18.1 build 625
• Intel® Soc FPGA Embedded Development Suite (Soc EDS) - Version 18.1 build 625
• Linux Installation(, whereby the Windows Subsystem for Linux is not suitable)

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This step by step guide covers the tools and console commands for Windows users. The programs and tools this guide uses
are Linux based. Intels approach for making these Linux tools accessible to Windows users is the wrapper Cygwin, because of
that, the steps and console commands in a Linux environment are nearly identical.

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 - Linux Installation - As OS or as a Virtual Machine - Windows Subsystem for Linux is not suitable

Introduction

This guide has the objective to give users, with basic knowledge of computers, basic ideas of FPGAs and Software Design Tools,
a detailed Insight into the required steps to build and compile the necessary files to be able to boot the Hard Processor System
of a Cyclone V FPGA from a SD card. The HPS is chosen because it offers a limited amount of complexity and shows the basic
usage of many features from a FPGA Design.

The design process is separated along the usage of different programs and or tools. The output files and folders of one step are
essential for the next processing step. Each step in its own can offer complexity of varying degree on demand. This complexity can not be handled in a simple guide.

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Step 1 - Intel Quartus Project

The first step within the HPS booting procedure is using the tool Intel Quartus. Within this tool it is necessary to creat a new project. After that, it is mandatory to configure the resources (system memory and SD card access) withing the Plattform Designer. After that, connect the basis interfaces (UART, I2C) of the HPS to the board resources and compile the project to create the ".sopinfo", the ".qip" files, and the "handoff" folder.

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Step 1 - Intel Quartus Project

 - Setup a project in Quartus Prime Lite (folder: project and project name: HPSexample)

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 - Compile the project to get the required files and folders for the next steps
    HPSexample.sopinfo / PlattformEditorHPS.qip file and (hps_isw_)handoff folder

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Step 2 - Generation of the preloader and main bootloader from U-Boot sources

Use the handoff folder to generate the preloader and main bootloader

[preloader-mkpimage.bin u-boot.img]

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Step 3 - Generation of the Device Tree Blob

Use the plattformDesigner.sopinfo file to generate the device tree
[dts and dtb]

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Step 4 - SD card setup for Intel Cyclone 5 HPS

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Web sources:

Embedded Linux Beginners Guide
https://rocketboards.org/foswiki/Documentation/EmbeddedLinuxBeginnerSGuide

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