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The first step within the HPS booting procedure is using the tool "Intel Quartus". Within this tool it is necessary to creat create a new project. After that, it is mandatory to configure the resources (system memory and SD card access) withing the Plattform Designer. After that, connect the basis interfaces (UART, I2C) of the HPS to the board resources and compile the project to create the ".sopinfo", the ".qip" files, and the "handoff" folder. Refer to "Intel Quartus project" for more detailed information.
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- Setup a project in Quartus Prime Lite (folder: project and project name: HPSexample)
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- Compile the project to get the required files and folders for the next steps
HPSexample.sopinfo / PlattformEditorHPS.qip file and (hps_isw_)handoff folder
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Step 2 -
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Preloader/Bootloader generation
In the second step, the in the first step generated handoff folder is used Use the handoff folder to generate the preloader and the main bootloader. Refer to "Preloader/Bootloader generation" for more detailed information.
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[preloader-mkpimage.bin u-boot.img]
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Step 3 -
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Device Tree Blob
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Generation
In the third step, the device tree blob is generated with the ".sopfile" file as input from the Plattform Designer in step 1. Refer to "Device Tree Blob Generation" for more detailed information.
Use the plattformDesigner.sopinfo file to generate the device tree
[dts and dtb]
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Step 4 - SD card setup
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In the final step, the SD card setup is created to prepare the boot medium to bring-up the HPS within Intel Cyclone V HPS. Refer to "SD card setup" for more detailed information.
References
In this reference section, further additionally information are delivered for deeper investigation.
- Building Bootloader
- Embedded Linux Beginners Guide
- Embedded Peripherals IP User Guide
- Device Tree Generation
- Generating and Compiling the Preloader
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Web sources:
Embedded Linux Beginners Guide
https://rocketboards.org/foswiki/Documentation/EmbeddedLinuxBeginnerSGuide
Introducing the Intel® Quartus® Prime Pro and Standard Edition Software User Guides
https://www.intel.com/content/www/us/en/programmable/products/design-software/fpga-design/quartus-prime/user-guides.html
Intel SoC FPGA Embedded Development Suite User Guide
https://www.intel.com/content/www/us/en/programmable/documentation/lro1402536290550.html
Intel® Soc EDS Support
https://www.intel.de/content/www/de/de/programmable/products/design-software/embedded-software-developers/soc-eds/support.html
Embedded Peripherals IP User Guide
https://www.intel.com/content/www/us/en/programmable/documentation/sfo1400787952932.html
SoC HPS System Generation
https://www.youtube.com/watch?v=8BehnPg8IvM
https://www.youtube.com/watch?v=L8FMSy7Uxjc
https://www.youtube.com/watch?v=vS7pvefsbRM
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- Intel® SoC EDS Support
- Intel® SoC FPGA Embedded Development Suite User Guide
- Introducing the Intel® Quartus® Prime Pro and Standard Edition Software User Guides
Generating and Compiling the Preloader
https://rocketboards.org/foswiki/Documentation/AVGSRDPreloader
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DTB
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Videos for SoC HPS System Generation
- Preloader and U-boot Generation for Altery Cyclone V SoC
- SoC HPS Quartus II Integration (HW/SW Hand-off)
- SoC HPS System Generation Using Qsys
Overview
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