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Table of contents

Overview

Firmware for RFSoC module CPLD with designator U31: LCMX02-640HC

Feature Summary

  • Firmware
  • Power Management
  • JTAG routing
  • LED

Firmware Revision and supported PCB Revision

See Document Change History

Product Specification

Port Description

Name / opt. VHD NameDirectionPinBank PowerDescription
PWR_STATUSout361.8V_CPLDOutput for Status-LED (After successful configuration of FPGA is connected automatically with FPGA_IO0)
MODE0out351.8V_CPLDZynqMP boot mode pin 0
PG_VCCRFin341.8V_CPLDPower Good input from PWR_PRE
SRST_Bout331.8V_CPLDFPGA external system reset  / currently_not_used
PROG_Bout321.8V_CPLDFPGA reset PL configuration logic / currently_not_used
PG_GR2in311.8V_CPLDPower control input from PWR_PS and PWR_DDR
MIO28_UART1_TXout291.8V_CPLDUART Transmition pin / currently_not_used
MIO28_UART1_RXin281.8V_CPLDUART Receive pin / currently_not_used
FPGA_IO0out271.8V_CPLDFPGA GPIO  / User LED
FPGA_IO1in261.8V_CPLDFPGA GPIO / User dip switch interface
EN_PS_PLout143.3V_CPLDPower enable for PWR_CORE , PWR_PS and PWR_GT
EN_GR1out153.3V_CPLDPower enable for PWR_GT and PWR_PS
EN_RF_ADCout163.3V_CPLDPower enable for PWR_ADC
PG_RF_DACin173.3V_CPLDPower control input from PWR_DAC
EN_VCCRFout183.3V_CPLDPower enable for PWR_PRE
EN_GR2out193.3V_CPLDPower enable for PWR_DDR , PWR_GT and PWR_PS
PG_PS_PLin203.3V_CPLDpower control input from PWR_CORE , PWR_GT and PWR_PS
PG_GR1in213.3V_CPLDPower control input from PWR_GT and PWR_PS
PG_RF_ADCin233.3V_CPLDPower control input from PWR_ADC
EN_RF_DACout243.3V_CPLDPower enable for PWR_DAC
MODE2out21.8V_CPLDZynqMP boot mode pin 2
MODE1out31.8V_CPLDZynqMP boot mode pin 1
POR_Bout41.8V_CPLDPower-On reset signal
MODE3out51.8V_CPLDZynqMP boot mode pin 3
INIT_Bin71.8V_CPLDFPGA PL initialization activity and configuration error signal / currently_not_used
F_TDIout81.8V_CPLDJTAG ZynqMP
F_TMSout91.8V_CPLDJTAG ZynqMP
F_TCKout101.8V_CPLDJTAG ZynqMP
F_TDOin111.8V_CPLDJTAG ZynqMP
DONEin121.8V_CPLDFPGA PL configuration done indicator
JTAG_TDOout483.3V_CPLDJTAG_B2B
JTAG_TDIin473.3V_CPLDJTAG_B2B
JTAG_TCKin453.3V_CPLDJTAG_B2B
JTAG_TMSin443.3V_CPLDJTAG_B2B
CPLD_IO0in433.3V_CPLDBOOT Mode input pin 0
CPLD_IO1in423.3V_CPLDBOOT Mode input pin 1
CPLD_JTAGENin413.3V_CPLDEnable JTAG access to CPLD for Firmware update (zero: JTAG routed to module, one: CPLD access)
CPLD_IO2inout403.3V_CPLDCPLD IO to B2B / Used as dip switch interface on the carrier board (After successful configuration of  FPGA is connected automatically with FPGA_IO1)
CPLD_IO3inout383.3V_CPLDCPLD IO to B2B/ Used as power good, can be used to enable carrier periphery power
RESETNin373.3V_CPLDReset pin of CPLD (Active low)


Firmware

See Document Change History.

Functional Description

JTAG

JTAG signals routed directly through the CPLD to FPGA. Access between CPLD and FPGA can be multiplexed via JTAGEN (logical one for CPLD, logical zero for FPGA) on B2B. In the carrier board TEB0835 can be activated this pin with S1-4 dip switch.

CPLD_JTAGENS1-4 on TEB0835 Carrier BoardDescription
0OFFFPGA access
1ONCPLD access

Power

In this module the CPLD is responsible for controlling the power of the module. There are different power regulators or DC/DC converters whose outputs can be controlled by an enable signal. At the same time the outputs can also be monitored by power-good signals.

Enable SignalPower Good SignalSchematic pageNetDomainRegulator/ DC-DC Converter in/out Voltage
EN_PS_PLPG_PS_PL

PWR_CORE

PWR_PS

PWR_GT

VCCINT, VCINT_IO, VCCBRAM

PSINTLP/PSINTFP,PSINTFP_DDR

MGTAVCC

PL

PS_LP/PS_FP

GTH

LTM4662EY

LTM4644EY

TPS82085

5V/0.835V

5V/0.85V

5V/0.9V

EN_GR1PG_GR1

PWR_PS

PWR_GT

PWR_GT

PSAUX,PSADC,PSIO/VCCAUX,VCCAUX_IO/PS_DDR_PLL

PSMGTRAVCC/MGTVCCAUX

PSPLL/MGTAVTT

PS_LP/PL/PS_FP

PS_FP/GTH

PS_LP/GTH

TPS82085

EP53A7LQI

EN6347QI

5V/1.8V

5V/0.85V

5V/1.2V

EN_GR2PG_GR2

PWR_PS

PWR_GT

PWR_DDR

PWR_DDR

VCC_B88_HD

PS_MGTRAVTT

DDR_2V5

DDR_1V2

PS_LP

PS_FP

DDR

DDR

TPS82085

EP53A7HQI

TPS82085

TPS82085

5V/3.3V

5V/1.8V

5V/2.5V

5V/1.2V

EN_VCCRFPG_VCCRFPWR_PREVCCINT_AMS, APRE_1V15, APRE_3V3ADC and DACLTM4644EY5V/0.8534V,1.15V,3.3V
EN_RF_ADCPG_RF_ADC

PWR_ADC

PWR_ADC

ADC_AVCC

ADC_AVCCAUX

ADC

ADC

TPS74401

TPS74401

1.15V/0.925V

3.3V/1.8V

EN_RF_DACPG_RF_DAC

PWR_DAC

PWR_DAC

PWR_DAC

DAC_AVCC

DAC_AVCCAUX

DAC_AVTT

DAC

DAC

DAC

TPS74801

TPS74801

TPS74801

5V/0.925V

5V/1.8V

5V/2.5V

Power-on Sequencing

According to the Xilinx instructions the power regulator or DC-DC converter must be switched on or off in a certain order. This is called power-on or power-off sequencing.To implement power-on sequencing correctly, a state machine must be running there. In the following you can see the State Machine Diagram.


StageControlVoltage DomainsSignal Monitoring to change stage
IDLE---------
STAGE0EN_PS_PL enabled (High)0.853V, 0.85V, 0.9V---
STAGE1EN_GR1  enabled (High)1.8V, 0.85V, 1.2VPG_PS_PL
STAGE2EN_GR2 enabled (High)3.3V, 1.8VPG_GR1
STAGE3EN_VCCRF enabled (High)0.8534V, 1.158V, 3.3VPG_GR2
STAGE4

EN_RF_ADC enabled (High)

EN_RF_DAC enabled (High)

0.925V, 1.8V

0.925V, 1.8V, 2.5V 

PG_VCCRF
STAGE5------

PG_RF_ADC

PG_RF_DAC

WAIT_RDY---------
RDYpor enabled (High)---pg_all
  • pg_all <= PG_PS_PL & PG_GR1 & PG_GR2 & PG_VCCRF & PG_RF_ADC & PG_RF_DAC
  • If por is high then POR_B (power-on reset signal) will be deactivated.


LED

StatesBlink SequenceComment
IDLEooooooooooooooooooo*Power Sequencing can not start. RESETN is active.
Stage 0ooooooooooooooooo*o*First enable signal (EN_PS_PL) is activated.
Stage 1ooooooooooooooo*o*o*The correct voltage in one of the following nets are failed: VCCINT, VCINT_IO, VCCBRAM, PSINTLP, PSINTFP, PSINTFP_DDR, MGTAVCC
Stage 2ooooooooooooo*o*o*o*The correct voltage in one of the following nets are failed: PSAUX, PSADC, PSIO, VCCAUX, VCCAUX_IO, PS_DDR_PLL, PSMGTRAVCC, MGTVCCAUX, PSPLL, MGTAVTT
Stage 3ooooooooooo*o*o*o*o*The correct voltage in one of the following nets are failed: VCC_B88_HD, PS_MGTRAVTT, DDR_2V5 , DDR_1V2
Stage 4ooooooooo*o*o*o*o*o*The correct voltage in one of the following nets are failed: VCCINT_AMS, APRE_1V15, APRE_3V3
Stage 5ooooooo*o*o*o*o*o*o*The correct voltage in one of the following nets are failed: ADC_AVCC, ADC_AVCCAUX, DAC_AVCC, DAC_AVCCAUX, DAC_AVTT
WAIT_RDYooooo*o*o*o*o*o*o*o*All power good signals are checked again.
RDYOFFPower is ok.
ERRORo*o*o*o*o*o*o*o*o*o*The main power supply must be switched off.
USRUser definedLED can be controlled by user, when Power is OK and FPGA part is programmed (DONE signal is high)
  • The period for erery blink (*o) is 0.5sec.

Boot Mode

Boot Modes can be selected via B2B Pin Mode.

B2B Pin J1-28 (CPLD IO1)B2B Pin J1-26 (CPLD IO0)Boot Mode
00Boot from PS JTAG
01Boot from QSPI
11Boot from SD Card

Appx. A: Change History and Legal Notices

Revision Changes

  • REV00 to REV01
    • transfer verilog to vhdl
    • power stagemachine, add power down cyclus on error state
    • bugfix: Power Good(CPLD_IO3) depends now on module power sequencing
    • LED status changed
    • LED controllable by USR after power up
    • CPLD_IO2 connected to FPGA IO (can be controlled by user)

Document Change History

To get content of older revision  got to "Change History"  of this page and select older document revision number.

DateDocument RevisionCPLD Firmware RevisionSupported PCB RevisionAuthorsDescription

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REV01REV02, REV01

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  • REV01 release
2020-08-18v.4REV00REV01 Ivan Girshchenko / Mohsen Chamanbaz
  • REV00 release (firmware release 2019-12-18)

All

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Legal Notices

Data Privacy

Please also note our data protection declaration at https://www.trenz-electronic.de/en/Data-protection-Privacy

Document Warranty

The material contained in this document is provided “as is” and is subject to being changed at any time without notice. Trenz Electronic does not warrant the accuracy and completeness of the materials in this document. Further, to the maximum extent permitted by applicable law, Trenz Electronic disclaims all warranties, either express or implied, with regard to this document and any information contained herein, including but not limited to the implied warranties of merchantability, fitness for a particular purpose or non infringement of intellectual property. Trenz Electronic shall not be liable for errors or for incidental or consequential damages in connection with the furnishing, use, or performance of this document or of any information contained herein.

Limitation of Liability

In no event will Trenz Electronic, its suppliers, or other third parties mentioned in this document be liable for any damages whatsoever (including, without limitation, those resulting from lost profits, lost data or business interruption) arising out of the use, inability to use, or the results of use of this document, any documents linked to this document, or the materials or information contained at any or all such documents. If your use of the materials or information from this document results in the need for servicing, repair or correction of equipment or data, you assume all costs thereof.

Copyright Notice

No part of this manual may be reproduced in any form or by any means (including electronic storage and retrieval or translation into a foreign language) without prior agreement and written consent from Trenz Electronic.

Technology Licenses

The hardware / firmware / software described in this document are furnished under a license and may be used /modified / copied only in accordance with the terms of such license.

Environmental Protection

To confront directly with the responsibility toward the environment, the global community and eventually also oneself. Such a resolution should be integral part not only of everybody's life. Also enterprises shall be conscious of their social responsibility and contribute to the preservation of our common living space. That is why Trenz Electronic invests in the protection of our Environment.

REACH, RoHS and WEEE

REACH

Trenz Electronic is a manufacturer and a distributor of electronic products. It is therefore a so called downstream user in the sense of REACH. The products we supply to you are solely non-chemical products (goods). Moreover and under normal and reasonably foreseeable circumstances of application, the goods supplied to you shall not release any substance. For that, Trenz Electronic is obliged to neither register nor to provide safety data sheet. According to present knowledge and to best of our knowledge, no SVHC (Substances of Very High Concern) on the Candidate List are contained in our products. Furthermore, we will immediately and unsolicited inform our customers in compliance with REACH - Article 33 if any substance present in our goods (above a concentration of 0,1 % weight by weight) will be classified as SVHC by the European Chemicals Agency (ECHA).

RoHS

Trenz Electronic GmbH herewith declares that all its products are developed, manufactured and distributed RoHS compliant.

WEEE

Information for users within the European Union in accordance with Directive 2002/96/EC of the European Parliament and of the Council of 27 January 2003 on waste electrical and electronic equipment (WEEE).

Users of electrical and electronic equipment in private households are required not to dispose of waste electrical and electronic equipment as unsorted municipal waste and to collect such waste electrical and electronic equipment separately. By the 13 August 2005, Member States shall have ensured that systems are set up allowing final holders and distributors to return waste electrical and electronic equipment at least free of charge. Member States shall ensure the availability and accessibility of the necessary collection facilities. Separate collection is the precondition to ensure specific treatment and recycling of waste electrical and electronic equipment and is necessary to achieve the chosen level of protection of human health and the environment in the European Union. Consumers have to actively contribute to the success of such collection and the return of waste electrical and electronic equipment. Presence of hazardous substances in electrical and electronic equipment results in potential effects on the environment and human health. The symbol consisting of the crossed-out wheeled bin indicates separate collection for waste electrical and electronic equipment.

Trenz Electronic is registered under WEEE-Reg.-Nr. DE97922676.


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