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Table of contents

Overview

Firmware for PCB-Master CPLD with designator U17. Use first CPLD Device in Chain: LCMX02-1200HC

Firmware for PCB-Slave CPLD with designator U39.  Use second CPLD Device in Chain: LCMX02-1200HC

Feature Summary

  • Power Management (Slave CPLD)
  • Reset Management  (both)
  • CPLD JTAG (both)
  • FMC JTAG / PJTAG (Master CPLD)
  • FMC VADJ Power (Master CPLD)
  • Boot Mode (Slave CPLD)
  • PCIe (Slave CPLD)
  • SD  (both)
  • UART SoC (Slave CPLD)
  • UART (Debug) (Master CPLD)
  • CAN (Master CPLD)
  • USB (Master CPLD)
  • DisplayPort (Master CPLD)
  • SFP (Master CPLD)
  • I2C (Master CPLD)
  • LEDs (both)
  • RGPIO (both)


Firmware Revision and supported PCB Revision

See Document Change History

Product Specification

Port Description

todo list of both cplds

Name / opt. VHD NameDirectionPinBank PowerDescriptionCPLDPCB REV02 Exception
C_T1
243V3SB / currently_not_used U17NC
C_T2
263V3SB / currently_not_used U17NC
C_T3
253V3SB / currently_not_used U17NC
C_TCKin1313V3SBJTAG J28 (XMOD2) / FMC JTAG
U17
C_TDIin1363V3SBJTAG J28 (XMOD2) / FMC JTAG
U17
C_TDO1 / C_TDOout1373V3SBJTAG J28 (XMOD2) / FMC JTAG
U17
C_TMSin1303V3SBJTAG J28 (XMOD2) / FMC JTAG
U17
CAN_FAULT
1063V3SBCANU17
CAN_RXin1073V3SBCANU17
CAN_Sout1053V3SBCANU17
CAN_TXout1043V3SBCANU17
CLK_125MHz / PHY_CLKin701.8V / currently_not_used U17
CON_NTRST / JTAG_TRSTin1173V3SBJTAG, Connector J30U17
CON_RTCK / JTAG_RTCKout1253V3SBJTAG, Connector J30U17
CON_sRST / JTAG_SRSTin1273V3SBJTAG, Connector J30U17
CON_TCK / JTAG_TCKin1223V3SBJTAG, Connector J30U17
CON_TDI / JTAG_TDIin1193V3SBJTAG, Connector J30U17
CON_TDO / JTAG_TDOout1263V3SBJTAG, Connector J30U17
CON_TMS / JTAG_TMSin1213V3SBJTAG, Connector J30U17
DIR_T1
233V3SB / currently_not_used U17NC
DIR_T2
283V3SB / currently_not_used U17NC
DIR_T3
273V3SB / currently_not_used U17NC
DP_AUX_DE / DP_DEout923V3SBDisplay PortU17
DP_AUX_RX / DP_RXin913V3SBDisplay PortU17
DP_AUX_TX / DP_TXout933V3SBDisplay PortU17
DP_ENout773V3SBDisplay PortU17
DP_TX_HPD / DP_HPDin943V3SBDisplay PortU17
ETH_RSTout621.8VETH ResetU17
EX_IO1
1123V3SB / currently_not_used U17
EX_IO2
1133V3SB / currently_not_used U17
EX_IO3
1143V3SB / currently_not_used U17
EX_IO4
1153V3SB / currently_not_used U17
F2_EN
193V3SB / currently_not_used U17NC
F2PWM
203V3SB / currently_not_used U17NC
F2SENSE
213V3SB / currently_not_used U17NC
FMC_CLK_DIR / FMC_CLKDIRin733V3SBFMCU17
FMC_TCKout953V3SBFMCU17
FMC_TDIout963V3SBFMCU17
FMC_TDOin973V3SBFMCU17
FMC_TMSout983V3SBFMCU17
FMC_VID0out1393V3SBFMCU17
FMC_VID1out1403V3SBFMCU17
FMC_VID2out1413V3SBFMCU17
GND
843V3SBREV03 unconnected / currently_not_usedU17USB_TRST, other USB HUB
HDIO_SC10 / SC10out601.8VFPGA / DP_RX or 'Z'U17
HDIO_SC11 / SC11in591.8VFPGA / DP_DEU17
HDIO_SC12 / SC12out581.8VFPGA / DP_HPDU17
HDIO_SC13 / SC13out571.8VFPGA / RGPIO TXU17
HDIO_SC14 / SC14in561.8VFPGA / RGPIO RXU17
HDIO_SC15 / SC15in551.8VFPGA / RGPIO CLKU17
HDIO_SC16 / SC16in541.8VFPGA / CAN_SU17
HDIO_SC17 / SC17in521.8VFPGA / XMOD LED U17
HDIO_SC18 / SC18in681.8VFPGA / CAN_TXU17
HDIO_SC19 / SC19out691.8VFPGA / CAN_RXU17
I2C_RSTout611.8VI2CU17
JTAGENB
1203V3SBexternal Pin for CPLD Firmware Update U17
LED_1A / JLED1out1093V3SBUSB3.0 LED JellowU17
LED_2A / JLED2Aout1113V3SBUSB3.0 LED Green/OrangeU17
LED_2B / JLED2Bout1103V3SBUSB3.0 LED Green/OrangeU17
MIO26out411.8VMIO / PJTAGU17
MIO27out401.8VMIO / PJTAGU17
MIO28in391.8VMIO / PJTAGU17
MIO29out381.8VMIO / PJTAGU17
NetU17_103
1033V3SB / currently_not_used U17
NetU17_129
1293V3SB / currently_not_used U17
NetU17_15
153V3SB / currently_not_used U17
NetU17_17
173V3SB / currently_not_used U17
NetU17_31
313V3SB / currently_not_used U17
NetU17_63
631.8V / currently_not_used U17
NetU17_87
873V3SB / currently_not_used U17
NetU17_89
893V3SB / currently_not_used U17
OCLK_EN / OSC_ENout743V3SBProgrammable Oscillator U45U17
PHY_CONFIGout651.8VETH PHYU17
PHY_LED0in671.8VETH PHYU17
PHY_LED1in863V3SBETH PHYU17
PHY_LED2in853V3SBETH PHYU17
SC_CLK0 / CLK0in763V3SB/ currently_not_usedU17
SC_CLK1 / CLK1in753V3SB/ currently_not_usedU17
SC_IO0 / X0out501.8VMTS dummyU17
SC_IO1 / X1in491.8Vinternal cpld RGPIO CLKU17
SC_IO2 / X2out481.8Vinternal cpld RGPIO TXU17
SC_IO3 / X3in471.8Vinternal cpld RGPIO RXU17
SC_IO4 / X4out451.8VSD WP to slave cpldU17
SC_IO5 / X5in441.8VSTM dummyU17
SC_IO6 / X6out431.8V/ currently_not_usedU17
SC_IO7 / X7out421.8V/ currently_not_usedU17
SC_IO8 / X8in223V3SBinternal cpld RGPIO available(1.8V on)U17
SC_SCL / SCLin143V3SBI2C Mux U27 / currently_not_usedU17
SC_SDA / SDAin133V3SBI2C Mux U27 / currently_not_usedU17
SC2_SW3 / SW3in63V3SBDIP-Switch S5-3U17
SC2_SW4 / SW4in53V3SBDIP-Switch S5-4U17
SD_WPin1003V3SBMMC SD WPU17
SFP_LED1 / SFP_LED0out813V3SBSFPU17
SFP_LED2 / SFP_LED1out823V3SBSFPU17
SFP_LED3 / SFP_LED2out783V3SBSFPU17
SFP_LED4 / SFP_LED3out833V3SBSFPU17
SFP1_LOS
323V3SBSFP / currently_not_used U17
SFP1_TX_DISout333V3SBSFPU17
SFP2_LOS
353V3SBSFP / currently_not_used U17
SFP2_TX_DISout343V3SBSFPU17
STAT_LED0 / LED0out993V3SBLED D4 Green U17
STAT_LED1 / LED1out1283V3SBLED D1 Red U17
USB0_RST / USB_TRST
711.8VUSB (U9) PHY ResetU17
USBH_LED_G3
113V3SBUSB Hub (U4)  / currently_not_used U17
USBH_LED_G4
123V3SBUSB Hub (U4)  / currently_not_used U17
USBH_LED_SS1
93V3SBUSB Hub (U4)  / currently_not_used U17
USBH_LED_SS2
1333V3SBUSB Hub (U4)  / currently_not_used U17
USBH_LED_SS3
1323V3SBUSB Hub (U4)  / currently_not_used U17
USBH_LED_SS4
1383V3SBUSB Hub (U4)  / currently_not_used U17
USBH_MODE0out1423V3SBUSB Hub (U4)U17
USBH_MODE1out1433V3SBUSB Hub (U4)U17
USBH_RSTout103V3SBUSB Hub (U4)U17
XMOD1_A / XMOD_TXDout33V3SBJ28 (XMOD 2 UART)U17
XMOD1_B / XMOD_RXDin23V3SBJ28 (XMOD 2 UART)U17
XMOD1_E / XMOD_Eout43V3SBJ28 (XMOD 2 LED)U17
XMOD1_G / XMOD_Gout13V3SBJ28 (XMOD 2 Button)U17
1.8V_EN / EN_1V8out1063V3SBEnable 1.8V PowerU39
5V_EN / EN_5Vout1153V3SBEnable 5V Power, can be permanently enabled by S4-4U39
C_TCK
1313V3SBJTAG J28 (XMOD2)  / currently_not_used U39
C_TDO
1373V3SBJTAG J28 (XMOD2)  / currently_not_used U39
C_TDO1
1363V3SBJTAG J28 (XMOD2)  / currently_not_used U39
C_TMS
1303V3SBJTAG J28 (XMOD2)  / currently_not_used U39
CLK_A / AUD_CLKout11.8VAUDIO U3 CLKU39
CLK_CPLD / MEMS_CLKINin1283V3SBU25 24,576MHzU39
DONEin671.8VPS DoneU39
EN_DDRout863V3SBEnable Module DDR PowerU39
EN_FMC / FMC_ENout1043V3SBFMCU39
EN_FPDout813V3SBEnable Module PS FPD PowerU39
EN_GT_Lout773V3SBEnable Module GT PowerU39
EN_GT_Rout933V3SBEnable Module GT PowerU39
EN_LPDout843V3SBEnable Module  PS LPD PowerU39
EN_PLout953V3SBEnable Module PL PowerU39
EN_PLL_PWRout783V3SBEnable Module SI5345 PowerU39
EN_PSGT / EN_PSGTRout753V3SBEnable Module PS GT PowerU39
ERR_OUT / ERRORin701.8VModule PS Error Out / StatusU39
ERR_STATUS / ERR_STATin691.8VModule PS Error StatusU39
F1PWMout1213V3SBFAN1U39
F1SENSEin1253V3SBFAN1U39
FAN_FMC_EN / FMC_FAN_EN
1323V3SBFMC FANU39
FMC_PG_C2Mout1413V3SBFMC PGU39
HD_LED_N / HDLED_Nout1123V3SBJ10 HD LEDU39
HD_LED_P / HDLED_Pout1103V3SBJ10 HD LEDU39
HDIO_SC0 / SC0in321.8VFPGA IO /  forward to HD_LED_P / HDLED_PU39
HDIO_SC1 / SC1in331.8V/ currently_not_used U39
HDIO_SC2 / SC2in341.8V/ currently_not_used U39
HDIO_SC3
351.8V / currently_not_used U39
HDIO_SC4
251.8V / currently_not_used U39
HDIO_SC5 / SC5out261.8VFPGA IO / RGPIOU39
HDIO_SC6 / SC6in271.8VFPGA IO / RGPIO CLKU39
HDIO_SC7 / SC7in281.8V.FPGA IO / RGPIOU39
I2C_SCL / SCLin501.8VI2C / currently_not_usedU39
I2C_SDA / SDAin521.8VI2C / currently_not_usedU39
INIT_B / INITin681.8VModule PS Init_BU39
JTAGENB
1203V3SBexternal Pin for CPLD Firmware UpdateU39
LP_GOOD / PG_LPDin833V3SBModule LP Power GoodU39
MIO24
381.8VMIO  / currently_not_used U39
MIO25
391.8VMIO  / currently_not_used U39
MIO30in481.8VMIOU39
MIO31in491.8VMIOU39
MIO32
401.8VMIO / currently_not_used U39
MIO33
411.8VMIO  / currently_not_used U39
MIO34
421.8VMIO  / currently_not_used U39
MIO35
431.8VMIO  / currently_not_used U39
MIO36
441.8VMIO  / currently_not_used U39
MIO37
451.8VMIO  / currently_not_used U39
MIO40in541.8VMIOU39
MIO41
551.8VMIO  / currently_not_used U39
MIO42out601.8VMIOU39
MIO43in611.8VMIOU39
MIO44
471.8VMIOU39
MOD_ENout1193V3SBEnable Main Module Power 3.3VU39
MODE0out61.8VModule Boot ModeU39
MODE1out91.8VModule Boot ModeU39
MODE2out101.8VModule Boot ModeU39
MODE3out111.8VModule Boot ModeU39
MR / MRESETnout923V3SBModule PS Power ResetU39
NetU39_103
1033V3SB / currently_not_used U39
NetU39_129
1293V3SB / currently_not_used U39
NetU39_15
151.8V / currently_not_used U39
NetU39_17
171.8V / currently_not_used U39
NetU39_31
311.8V / currently_not_used U39
NetU39_63
631.8V / currently_not_used U39
NetU39_87
873V3SB / currently_not_used U39
NetU39_89
893V3SB / currently_not_used U39
PCI_SFP_ENout763V3SBSFPU39
PER_ENout1173V3SBEnable 3.3V powerU39
PERST / PERSTnout1393V3SBPCIE ResetnU39
PG_DDRin913V3SBModule Power GoodU39
PG_FPDin853V3SBModule Power GoodU39
PG_GT_Lin963V3SBModule Power GoodU39
PG_GT_Rin943V3SBModule Power GoodU39
PG_PLin823V3SBModule Power GoodU39
PG_PLL_1V8 / PG_PLLin733V3SBModule Power GoodU39
PG_PSGTin743V3SBModule Power GoodU39
PLL_LOLn / PLL_LOLin581.8VModule PLL / currently_not_usedU39
PLL_RST / PLL_RSTnout561.8VModule PLL ResetU39
PLL_SEL0out571.8VModule PLLU39
PLL_SEL1out591.8VModule PLLU39
POK_1V8in1073V3SBCarrier Power GoodU39
POK_FMCin993V3SBFMC Power GoodU39
PROG_BOUT711.8VModule PS_PROG_BU39
PSONout1053V3SBATX J20 PS_ON_NU39
PWR_BTNin1133V3SBPower Button S1 or J10U39
PWRLED_N / LED_Nout1113V3SBJ10 PWRU39
PWRLED_P / LED_Pout1093V3SBJ10 PWRU39
PWROKin1003V3SBATX J20 PWROKU39
RST_BTNin1143V3SBReset Button S2 or J10U39
S_1
1273V3SB / currently_not_used U39
SC_IO0 / X0in121.8VMTS dummyU39
SC_IO1 / X1out131.8Vinternal cpld RGPIO CLKU39
SC_IO2 / X2in141.8Vinternal cpld RGPIO RXU39
SC_IO3 / X3out201.8Vinternal cpld RGPIO TXU39
SC_IO4 / X4in211.8VMMC SD WP from masterU39
SC_IO5 / X5out221.8VSTM dummyU39
SC_IO6 / X6in231.8V / currently_not_used U39
SC_IO7 / X7in241.8V / currently_not_used U39
SC_IO8 / X8out1263V3SBinternal cpld RGPIO available(1.8V on)U39
SC2_SW1 / SW1in1333V3SBS5-1 / Boot Mode SelectionU39
SC2_SW2 / SW2in1383V3SBS5-2 / Boot Mode SelectionU39
SD_A_ENout1403V3SBMicro SDU39
SD_B_ENout1223V3SBMMC SDU39
SD_CD / SD_CD_OUTout651.8VSD Card detect to FPGAU39
SD_CD_Bin1433V3SBMMC SD CDU39
SD_CD_Sin1423V3SBMicro SD CDU39
SEL_SD / SD_SELout621.8VSD select (Mirco or MMC)U39
SRST_B / SRSTnout191.8VModule PS_SRST_BU39
STAT_LED2 / LED2out983V3SBLED D6 GreenU39
STAT_LED3 / LED3out973V3SBLED D7 RedU39
XMOD2_A / XMOD_TXDout51.8VJ12 (XMOD 1 UART)U39
XMOD2_B / XMOD_RXDin41.8VJ12 (XMOD 1 UART)U39
XMOD2_E / XMOD_LEDout31.8VJ12 (XMOD 1 LED)U39
XMOD2_G / XMOD_BTNin21.8VJ12 (XMOD 1 Button)U39

Functional Description

JTAG

JTAGENB set carrier board CPLD into the chain for firmware update. For Update set DIP S4-3 to ON.

Power

FMC VADJ is handled on master CPLD.

DIPPositonDescription
S5-4ON1.8V
S5-4OFF1.2V

Power on and off sequencing is done with slave CPLD

Power On/OFF Sequencing

Reset

Power, Zynq reset and PCIe is handle on Slave CPLD

USB, I2C Reset is handled on Master CPLD

todo description


CPLD JTAG

todo (both)

FMC JTAG / PJTAG

todo (Master CPLD)

Boot Mode

todo (Slave CPLD)

PCIe

todo (SlaveCPLD)

SD

todo (both)

UART SoC

todo (SlaveCPLD)

UART (Debug)

todo todo (Master CPLD)

CAN

todo (Master CPLD)

USB

todo (Master CPLD)

DisplayPort

todo todo (Master CPLD)

SFP

todo todo (Master CPLD)

I2C

todo todo (Master CPLD)

LEDs

todo (both)

RGPIO 

todo (both)


Appx. A: Change History and Legal Notices

Revision Changes

MasterSlave

CPLD REV06 to REV07

  • complete rework

  • add inter CPLD RGPIO

  • new LED debugging sequencing

  • simple UART output with Revision Number and some statistic on second XMOD

CPLD REV05 to REV06

  • BUGFIX: renamed SC19 to SC17
  • Connect FMC JTAG to XMOD2 JTAG
  • Connect PJTAG0 (MIO29..26) to JTAG Pin Header J30
  • Connect CAN to PL
  • RGPIO Pin changes

CPLD REV04 to REV05

  • SD WP
  • XMOD LED access over PL

Older Revision (PCB REV03) to CPLD REV04

  • Fix USB HUB Mode default state over RGPIO
  • Invert JLED2B over RGPIO

Older Revision (PCB REV02) to CPLD REV04

  • Add all functionality from older Revision (PCB REV03)

CPLD REV06 to REV07

  • complete rework
  • add variants (power up and SD)multi-functions for buttons
  • power on and power downs sequencing
    • module complete disable on power down
    • power on sequencing
    • power down sequencing --> can be forced with power button (hold longer)
  • Soft PS or PS POR Reset on Reset button (hold longer for PS POR Reset)
  • add inter CPLD RGPIO
  • new SoC RGPIO Pinout
  • removed reboot for pcie initialization
  • new LED debugging sequencing
  • Disabled UART on power down state
  • bugfix WP pin for microSD slot
  • removed PCIe Reboot.

CPLD REV05 to REV06

  • LED Status changes of LED D2 D3 and HD_LED, XMOD LED

  • extended Power Management

CPLD REV04 to REV05

  • PS reboot via FSBL over MIO30 (need for proper PCI initialization on first power on without press Reset Button)
  • SD Boot from micoSD only if switch S5-1/-2 is selected to ON
  • RGPIO connection
  • Add SD WP to FPGA
  • Power, Rest Button debounced
  • direct LED access via MIO and PL

Older Revision (PCB REV03) to CPLD REV04

  • Bugfix: PCIe Reset Pin location.
  • Bugfix: Swapping HDLED and PWRLED location.
  • Bugfix: MEMS_CLKIN Pin location.
  • Add XMOD 1 LED

Older Revision (PCB REV02) to CPLD REV04

  • Add all functionality from older Revision (PCB REV03)

Document Change History

To get content of older revision  got to "Change History"  of this page and select older document revision number.

DateDocument RevisionCPLD Firmware RevisionSupported PCB RevisionAuthorsDescription

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REV07REV03,REV04*

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  • Work in progress
  • *please write to Trenz Electronic support for PCB REV02
2017-06-07

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  • Initial release (combine Master and Slave CPLD description  )

All

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Document Warranty

The material contained in this document is provided “as is” and is subject to being changed at any time without notice. Trenz Electronic does not warrant the accuracy and completeness of the materials in this document. Further, to the maximum extent permitted by applicable law, Trenz Electronic disclaims all warranties, either express or implied, with regard to this document and any information contained herein, including but not limited to the implied warranties of merchantability, fitness for a particular purpose or non infringement of intellectual property. Trenz Electronic shall not be liable for errors or for incidental or consequential damages in connection with the furnishing, use, or performance of this document or of any information contained herein.

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Technology Licenses

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REACH

Trenz Electronic is a manufacturer and a distributor of electronic products. It is therefore a so called downstream user in the sense of REACH. The products we supply to you are solely non-chemical products (goods). Moreover and under normal and reasonably foreseeable circumstances of application, the goods supplied to you shall not release any substance. For that, Trenz Electronic is obliged to neither register nor to provide safety data sheet. According to present knowledge and to best of our knowledge, no SVHC (Substances of Very High Concern) on the Candidate List are contained in our products. Furthermore, we will immediately and unsolicited inform our customers in compliance with REACH - Article 33 if any substance present in our goods (above a concentration of 0,1 % weight by weight) will be classified as SVHC by the European Chemicals Agency (ECHA).

RoHS

Trenz Electronic GmbH herewith declares that all its products are developed, manufactured and distributed RoHS compliant.

WEEE

Information for users within the European Union in accordance with Directive 2002/96/EC of the European Parliament and of the Council of 27 January 2003 on waste electrical and electronic equipment (WEEE).

Users of electrical and electronic equipment in private households are required not to dispose of waste electrical and electronic equipment as unsorted municipal waste and to collect such waste electrical and electronic equipment separately. By the 13 August 2005, Member States shall have ensured that systems are set up allowing final holders and distributors to return waste electrical and electronic equipment at least free of charge. Member States shall ensure the availability and accessibility of the necessary collection facilities. Separate collection is the precondition to ensure specific treatment and recycling of waste electrical and electronic equipment and is necessary to achieve the chosen level of protection of human health and the environment in the European Union. Consumers have to actively contribute to the success of such collection and the return of waste electrical and electronic equipment. Presence of hazardous substances in electrical and electronic equipment results in potential effects on the environment and human health. The symbol consisting of the crossed-out wheeled bin indicates separate collection for waste electrical and electronic equipment.

Trenz Electronic is registered under WEEE-Reg.-Nr. DE97922676.


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