You are viewing an old version of this page. View the current version.

Compare with Current View Page History

« Previous Version 18 Next »

Table of contents

Overview

Firmware for PCB-Slave CPLD with designator U39. Second CPLD Device in Chain: LCMX02-1200HC

Feature Summary

Firmware Revision and supported PCB Revision

See Document Change History

Product Specification

Port Description

NameDirectionPinDescription
1.8V_EN  / EN_1V8out106Power
5V_EN          115(currently controlled via S4-4) / currently_not_used
C_TCK          131JTAG J28 (XMOD2) / internal currently_not_used
C_TDO          137JTAG J28 (XMOD2) / internal currently_not_used
C_TDO1         136JTAG J28 (XMOD2) / internal currently_not_used
C_TMS          130JTAG J28 (XMOD2) / internal currently_not_used
CLK_A / AUD_CLK        out1AUDIO U3 CLK
CLK_CPLD / MEMS_CLKINin128U25 24,576MHz
DONE          in67PS Done / currently_not_used
EN_DDR        out86Enable DDR Power
EN_FMC / FMC_EN    out104FMC
EN_FPD        out81Enable PS FPD Power
EN_GT_L       out77Enable  GT Power
EN_GT_R       out93 Enable GT Power
EN_LPD        out84Enable PS LPL Power
EN_PL         out95Enable PL Power
EN_PLL_PWR    out78Enable SI5345 Power
EN_PSGT / EN_PSGTR      out75Enable  PS GT Power
ERR_OUT  / ERROR    in70PS Error Out / currently_not_used
ERR_STATUS  / ERROR_STATin69PS Error Status / currently_not_used
F1PWM         out121FAN1
F1SENSE       in125FAN1
FAN_FMC_EN    out132FMC FAN
FMC_PG_C2M     141FMC / currently_not_used
HD_LED_N / HDLED_Nout112J10 HD LED
HD_LED_P / HDLED_Pout110J10 HD LED
HDIO_SC0 / SC0in32FPGA IO
HDIO_SC1 / SC1in33FPGA IO
HDIO_SC2 / SC2in34FPGA IO
HDIO_SC3 / SC3out35FPGA IO
HDIO_SC4 / SC4out25FPGA IO
HDIO_SC5 / SC5out26FPGA IO
HDIO_SC6 / SC6in27FPGA IO / CLK
HDIO_SC7 / SC7     in28FPGA IO
I2C_SCL / SCLin50I2C / currently_not_used
I2C_SDA / SCAin52I2C / currently_not_used
INIT_B / INITin68PS init B / currently_not_used
JTAGENB 
120external Pin for CPLD Firmware Update 
LP_GOOD  / PG_LPD    in83LP Power Good / currently_not_used
MIO24          38MIO / currently_not_used
MIO25          39MIO / currently_not_used
MIO30          48MIO / currently_not_used
MIO31         in49MIO / currently_not_used
MIO32           40MIO / currently_not_used
MIO33           41MIO / currently_not_used
MIO34           42MIO / currently_not_used
MIO35           43MIO / currently_not_used
MIO36           44MIO / currently_not_used
MIO37           45MIO / currently_not_used
MIO40           54MIO / currently_not_used
MIO41          55MIO / currently_not_used
MIO42         out60FPGA UART RX
MIO43         in61FPGA UART TX
MIO44          47/ currently_not_used
MOD_EN        out119Module Power 3.3V Enable
MODE0         out6Boot Mode
MODE1         out9Boot Mode
MODE2         out10Boot Mode
MODE3         out11Boot Mode
MR / MRESETn           out92PS Reset
PCI_SFP_EN    out76SFP
PER_EN        out117Baseboard Power 3.3V Enable
PERST / PERSTn        out139PCIE Resetn
PG_DDR        in91Power Good / currently_not_used
PG_FPD        in85Power Good / currently_not_used
PG_GT_L       in96Power Good / currently_not_used
PG_GT_R       in94Power Good / currently_not_used
PG_PL         in82Power Good / currently_not_used
PG_PLL_1V8 / PG_PLLin73Power Good / currently_not_used
PG_PSGT       in74Power Good / currently_not_used
PLL_LOLN / PLL_LOL     in58Module U5 Si5345 / currently_not_used
PLL_RST / PLL_RSTn      out56Module U5 Si5345
PLL_SEL0      out57Module U5 Si5345
PLL_SEL1      out59Module U5 Si5345
POK_1V8        107Power / currently_not_used
POK_FMC        99FMC Power/ currently_not_used
PROG_B        inout71PS_PROG_B
PSON          out105ATX J20 PS_ON_N
PWR_BTN       in113Power Button S1 or J10
PWRLED_N / LED_Nout111J10 PWR
PWRLED_P / LED_Pout109J10 PWR
PWROK         in100ATX J20 PWROK
RST_BTN       in114Reset Button S2 or J10
S_1 127Beeper/ currently_not_used
SC_IO0 / X0out12Master-Slave SC-Communication / Power Reset
SC_IO1 / X1out13Master-Slave SC-Communication / Power Reset
SC_IO2 / X2out14Master-Slave SC-Communication / currently_not_used
SC_IO3 / X3out20Master-Slave SC-Communication / currently_not_used
SC_IO4 / X4in21Master-Slave SC-Communication / currently_not_used
SC_IO5 / X5in22Master-Slave SC-Communication / currently_not_used
SC_IO6 / X6in23Master-Slave SC-Communication / Sanity check from other CPLD (FMC VADJ Enable)
SC_IO7 / X7       in24Master-Slave SC-Communication / Sanity check from other CPLD (FMC VADJ Enable)
SC_IO8 / dummy       126/ currently_not_used / ! not available on PCB REV2 !
SC2_SW1       in133S5-1 / Boot Mode Selection
SC2_SW2       in138S5-2 / Boot Mode Selection
SD_A_EN       out140Micro SD
SD_B_EN       out122MMC SD
SD_CD / SD_CD_OUTout65SD Card detect to FPGA
SD_CD_B       in143MMC SD
SD_CD_S       in142Micro SD
SEL_SD / SD_SELout62Select SD
SRST_B / SRSTn      out19PS_SRST_B
STAT_LED2 / LED2out98LED D6 Green
STAT_LED3 / LED3out97LED D7 Red
XMOD2_A / XMOD_TXD     out5J12 (XMOD 1)
XMOD2_B / XMOD_RXDin4J12 (XMOD 1)
XMOD2_E  / XMOD_LED   out3J12 (XMOD 1)
XMOD2_G  / XMOD_BTNin2J12 (XMOD 1)

 

Functional Description

JTAG

JTAGENB set carrier board CPLD into the chain for firmware update. For Update set DIP S4-3 to ON.

Power

PSON signal will be enabled/disabled after delay, when Power Button is pressed.

ATX PSON is set by PSON signal. This enable/disable 12V power supply from ATX connector.

PCI and SFP Power is always enabled, if 12V is available.

Module 3.3V is always enabled, if 12V is available.

Baseboard 3.3V is always enabled, if 12V is available.

Module PS LPL Power is always enabled, if 12V is available.

Module PS FPD Power is always enabled, if 12V is available.

Module PL Power is always enabled, if 12V is available.

Module  DDR Power is always enabled, if 12V is available.

Module PLL Power is always enabled, if 12V is available.

Module PS GT Power is always enabled, if 12V is available.

Module PL GT L/R Power is always enabled, if 12V is available.

TE0808 module is not completely powered off with power button, if 12V power jack (J25) is used for power supply. 12V Power ON/OFF is currently only for ATX connector implemented.

Enable

SD's will be enabled by PSON.

FMC_FAN_EN will be enabled by PSON or RGPIO (11) controlled, when active.

 

Reset

NameDescription
PLL_RSTnnot RGPIO (0) when active else '1'
SRSTnnot RGPIO (1) when active else '1'
MRESETnnot RGPIO (2) when active else RST_BTN
PERSTnnot RGPIO (3) when active else PWR_BTN
Master CPLD Resetwith PSON and Reset Button over CPLD interconnect.

Boot Mode

S4-1S4-2Description
ONONDefault, boot from SD/eMMC or SPI Flash if no SD is detected
OFFONBoot mode  PJTAG0
ONOFFBoot from eMMC
OFFOFFBoot mode main  JTAG

If MicroSD is detected, the system boots from this SD-Card independents from S4 setting.

 

UART

XMOD_TXD is sourced by MIO43 and MIO42 by XMOD_RXD.

Module SI5345

Module U5 Selection Pins are set fix to zero.

RGPIO

RGPIO Pin to FPGAValue
0SW1
1SW2
2RST_BTN
3PWR_BTN
4SD_CD_S
5SD_CD_B
6F1SENSE
7PWROK
8XMOD_BTN
9-19unused
20PLL_LOL
21-23unused
24-27reserved
28-31Interface detection
RGPIO Pin from FPGAValue
0PLL_RSTn
1SRSTn
2MRESETn
3PERSTn
4PROG_B
5LED2
6LED3
7LED_N
8LED_P
9HDLED_N
10HDLED_P
11FMC_FAN_EN
12-23unused
24-27reserved
28-31Interface detection

 

LED

NameDescription
LED2 D6 GreenRGPIO (5) when active else slow_blink when PSON is off else on
LED3 D7 RedRGPIO (6) when active else not RST_BTN or mode_blink
LED_NRGPIO (7) when active else off
LED_Pnot RGPIO (8) when active else slow_blink when PSON is off else on
HDLED_NRGPIO (9) when active else off
HDLED_Pnot RGPIO (10) when active else reset Button is pressed
XMOD_LED  RedDone Pin: ON is not programmed, OFF programmed

*slow_blink: ~0,7 Hz

*mode_blink:

  •  ModeBlink SequenceComment
    Error********~5,8 Hz
    JTAG*****ooo~0,7 Hz, duty cycle 5/8
    PJTAG0****oooo~0,7 Hz, duty cycle 4/8
    eMMC***ooooo~0,7 Hz, duty cycle 3/8
    SPI Boot**oooooo~0,7 Hz, duty cycle 2/8
    SD Boot*ooooooo~0,7 Hz, duty cycle 1/8

Appx. A: Change History and Legal Notices

Revision Changes

Older Revision (PCB REV03) to CPLD REV04

  • Bugfix: PCIe Reset Pin location.
  • Bugfix: Swapping HDLED and PWRLED location.
  • Bugfix: MEMS_CLKIN Pin location.
  • Add XMOD 1 LED

Older Revision (PCB REV02) to CPLD REV04

  • Add all functionality from older Revision (PCB REV03)

Document Change History

To get content of older revision  got to "Change History"  of this page and select older document revision number.

DateDocument RevisionCPLD Firmware RevisionSupported PCB RevisionAuthorsDescription

Error rendering macro 'page-info'

Ambiguous method overloading for method jdk.proxy244.$Proxy3557#hasContentLevelPermission. Cannot resolve which method to invoke for [null, class java.lang.String, class com.atlassian.confluence.pages.Page] due to overlapping prototypes between: [interface com.atlassian.confluence.user.ConfluenceUser, class java.lang.String, class com.atlassian.confluence.core.ContentEntityObject] [interface com.atlassian.user.User, class java.lang.String, class com.atlassian.confluence.core.ContentEntityObject]

Error rendering macro 'page-info'

Ambiguous method overloading for method jdk.proxy244.$Proxy3557#hasContentLevelPermission. Cannot resolve which method to invoke for [null, class java.lang.String, class com.atlassian.confluence.pages.Page] due to overlapping prototypes between: [interface com.atlassian.confluence.user.ConfluenceUser, class java.lang.String, class com.atlassian.confluence.core.ContentEntityObject] [interface com.atlassian.user.User, class java.lang.String, class com.atlassian.confluence.core.ContentEntityObject]


 

REV04REV02, REV03, REV04 

Error rendering macro 'page-info'

Ambiguous method overloading for method jdk.proxy244.$Proxy3557#hasContentLevelPermission. Cannot resolve which method to invoke for [null, class java.lang.String, class com.atlassian.confluence.pages.Page] due to overlapping prototypes between: [interface com.atlassian.confluence.user.ConfluenceUser, class java.lang.String, class com.atlassian.confluence.core.ContentEntityObject] [interface com.atlassian.user.User, class java.lang.String, class com.atlassian.confluence.core.ContentEntityObject]


Revision 04 finished
2016-04-11

v.1

--- 

Error rendering macro 'page-info'

Ambiguous method overloading for method jdk.proxy244.$Proxy3557#hasContentLevelPermission. Cannot resolve which method to invoke for [null, class java.lang.String, class com.atlassian.confluence.pages.Page] due to overlapping prototypes between: [interface com.atlassian.confluence.user.ConfluenceUser, class java.lang.String, class com.atlassian.confluence.core.ContentEntityObject] [interface com.atlassian.user.User, class java.lang.String, class com.atlassian.confluence.core.ContentEntityObject]


Initial release
 All  
 

Legal Notices

Data Privacy

Please also note our data protection declaration at https://www.trenz-electronic.de/en/Data-protection-Privacy

Document Warranty

The material contained in this document is provided “as is” and is subject to being changed at any time without notice. Trenz Electronic does not warrant the accuracy and completeness of the materials in this document. Further, to the maximum extent permitted by applicable law, Trenz Electronic disclaims all warranties, either express or implied, with regard to this document and any information contained herein, including but not limited to the implied warranties of merchantability, fitness for a particular purpose or non infringement of intellectual property. Trenz Electronic shall not be liable for errors or for incidental or consequential damages in connection with the furnishing, use, or performance of this document or of any information contained herein.

Limitation of Liability

In no event will Trenz Electronic, its suppliers, or other third parties mentioned in this document be liable for any damages whatsoever (including, without limitation, those resulting from lost profits, lost data or business interruption) arising out of the use, inability to use, or the results of use of this document, any documents linked to this document, or the materials or information contained at any or all such documents. If your use of the materials or information from this document results in the need for servicing, repair or correction of equipment or data, you assume all costs thereof.

Copyright Notice

No part of this manual may be reproduced in any form or by any means (including electronic storage and retrieval or translation into a foreign language) without prior agreement and written consent from Trenz Electronic.

Technology Licenses

The hardware / firmware / software described in this document are furnished under a license and may be used /modified / copied only in accordance with the terms of such license.

Environmental Protection

To confront directly with the responsibility toward the environment, the global community and eventually also oneself. Such a resolution should be integral part not only of everybody's life. Also enterprises shall be conscious of their social responsibility and contribute to the preservation of our common living space. That is why Trenz Electronic invests in the protection of our Environment.

REACH, RoHS and WEEE

REACH

Trenz Electronic is a manufacturer and a distributor of electronic products. It is therefore a so called downstream user in the sense of REACH. The products we supply to you are solely non-chemical products (goods). Moreover and under normal and reasonably foreseeable circumstances of application, the goods supplied to you shall not release any substance. For that, Trenz Electronic is obliged to neither register nor to provide safety data sheet. According to present knowledge and to best of our knowledge, no SVHC (Substances of Very High Concern) on the Candidate List are contained in our products. Furthermore, we will immediately and unsolicited inform our customers in compliance with REACH - Article 33 if any substance present in our goods (above a concentration of 0,1 % weight by weight) will be classified as SVHC by the European Chemicals Agency (ECHA).

RoHS

Trenz Electronic GmbH herewith declares that all its products are developed, manufactured and distributed RoHS compliant.

WEEE

Information for users within the European Union in accordance with Directive 2002/96/EC of the European Parliament and of the Council of 27 January 2003 on waste electrical and electronic equipment (WEEE).

Users of electrical and electronic equipment in private households are required not to dispose of waste electrical and electronic equipment as unsorted municipal waste and to collect such waste electrical and electronic equipment separately. By the 13 August 2005, Member States shall have ensured that systems are set up allowing final holders and distributors to return waste electrical and electronic equipment at least free of charge. Member States shall ensure the availability and accessibility of the necessary collection facilities. Separate collection is the precondition to ensure specific treatment and recycling of waste electrical and electronic equipment and is necessary to achieve the chosen level of protection of human health and the environment in the European Union. Consumers have to actively contribute to the success of such collection and the return of waste electrical and electronic equipment. Presence of hazardous substances in electrical and electronic equipment results in potential effects on the environment and human health. The symbol consisting of the crossed-out wheeled bin indicates separate collection for waste electrical and electronic equipment.

Trenz Electronic is registered under WEEE-Reg.-Nr. DE97922676.


Error rendering macro 'page-info'

Ambiguous method overloading for method jdk.proxy244.$Proxy3557#hasContentLevelPermission. Cannot resolve which method to invoke for [null, class java.lang.String, class com.atlassian.confluence.pages.Page] due to overlapping prototypes between: [interface com.atlassian.confluence.user.ConfluenceUser, class java.lang.String, class com.atlassian.confluence.core.ContentEntityObject] [interface com.atlassian.user.User, class java.lang.String, class com.atlassian.confluence.core.ContentEntityObject]

 

  • No labels