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Table of Contents

Overview

The Cyclone10 LP Reference Kit is the world's first development board with a 55kLE Intel Cyclone 10 LP and a variety of interfaces for numerous applications. The board is comprehensively tested and ready for use with end products and can also be ordered in customer-specific variants according to your requirements.

Refer to http://trenz.org/tei0009-info for the current online version of this manual and other available documentation.

Key Features

  • Intel® Cyclone 10 LP  [10CL055YU484C8G],
    • Package: UBGA-484
    • Speed Grade: 8 (Slowest)
    • Temperature: 0°C ~ 85°C
    • Package compatible device 10CL016, 10CL040, 10CL080 as assembly variant on request is possible
  • 16 MBit flash memory (optional up to 32 MBit possible)
  • Integrated USB2.0 Programmer
  • Pin Header connectors
  • 256 MBit (optional up to 512 MBit possible) SDRAM
  • 128 MBit (optional up to 512 MBit possible) User Quad-SPI Flash memory
  • 64 MBit HyperRAM(Pseudo SRAM) (optional up to 128 MBit possible)
  • FTDI - System Controller (CPLD)
  • 2x MAC address EEPROM
  • 2x Fast Ethernet PHY (10/100 Mbps)
  • 8-channel, 12-bit, configurable ADC /DAC with on-chip reference
  • D-Sub connector
  • 2x RJ45 connector
  • LEDs:
    • Status LEDs, Power LED
    • 13x User LEDs
    • 7-segment display
  • Push bottuns:
    • 2x Reset Push buttons
    • 5x User Push buttons
  • I/O:
    • GPIO: 321
    • LVDS: 132
  • Power Supply: 
    • 5 V
    • Minimum 1A
  • Dimension: 95 mm x 110 mm
  • Others:
    • Reverse polarity of supply voltage protection
    • Under/Over voltage protection

Block Diagram

TEI0009 block diagram

Main Components

TEI0009 main components
  1. Barrel Jack, J12
  2. RJ45 socket, J8...9
  3. D-Sub Connector, J11
  4. Push button(Reset), S7
  5. Grove connector, J5
  6. Under/Over Voltage Protecter, U9
  7. 7-segment LED, D11
  8. 1x6 pin header, J4
  9. 1x8 pin header, J2...3
  10. User Red LEDs, D2...9
  11. 8x User Red LEDs, D13...17
  12. 5x User Push buttons, S1- S3...6
  13. Red LED (CONF_DONE), D10
  14. PSRAM memory, U3
  15. SDRAM memory, U10
  16. Voltage Regulator, U5- U7
  17. AD/DA Convertor, U2
  18. Pmod 2x6 SMD host socket, P1...6
  19. Intel®Cyclone 10 LP, U1
  20. Configuration memory, U5
  21. 1x10 pin header, J1
  22. EEEPROM, U15- U18- U20
  23. FTDI USB2 to JTAG/UART adapter, U14
  24. Micro USB 2.0 (receptacle) J10
  25. Push button (RST_GPIO), S2
  26. Oscillator, U22
  27. Ethernet PHY, U17- U19
  28. QSPI Flash memory, U12

Initial Delivery State

Storage device name

Content

Notes

QSPI Flash

Not programmed


EEPROMProgrammed

FTDI configuration

SDRAMNot programmed


PSRAMNot programmed
FTDI System Controller CPLDNot programmed
Configuration MemoryDemo Design
Initial delivery state of programmable devices on the module

Configuration Signals

Configuration mode has been set to AS (Active Serial) configuration. 

MODE Signal State

MSEL0MSEL1MSEL2MSEL3Connected to Boot Mode

MSEL[0:3]

0100Bank 6

AS (Active Serial)

Boot process.

RESET pin can be set through the push button S1.

Signal

Connected to Note

RESET

S7 (Push button)Connected to nCONFIG
RST_GPIOS2 (Push button)
EXT_RST

J3 (1x8 pin header)

Bank 2


Reset process.

Signals, Interfaces and Pins

I/Os on Pin Headers and Connectors

FPGA bank number and number of I/O signals connected to the B2B connector:

FPGA BankConnector I/O Signal CountVoltage LevelNotes
Bank 1J1 (Pin header)8 Single ended3.3 V
J2 (Pin header)8 Single ended3.3 V
J4 (Pin header)6 Single ended3.3 V
Bank 2

J3 (Pin header)

1 Single ended3.3 V
P1 (PMod SMD host socket)8 Single ended3.3 V
P2 (PMod SMD host socket)8 Single ended3.3 V
J11 (VGA host Socket)14 Single ended3.3 V
Bank 6J5 (Grove connector)2 Single ended3.3 V
Bank 7P5 (PMod SMD host socket)8 Single ended3.3 V
P6 (PMod SMD host socket)8 Single ended3.3 V
Bank 8P3 (PMod SMD host socket)8 Single ended3.3 V
P4 (PMod SMD host socket)8 Single ended3.3 V
General I/O to Pin header and Pmod SMD connectors information

PMod SMD Host Socket

TEI0009 has 6 PMod 2x6 SMD Host Socket 90° which are connected to Cyclon 10 LP (U1).

DesignatorSignalsConnected to Notes
P1P1_IO1...8Bank 2
P2P2_IO1...8Bank 2
P3P3_IO1...8Bank 8
P4P4_IO1...8Bank 8
P5P5_IO1...8Bank 7
P6P6_IO1...8Bank 7
PMod SMD host socket information

UART Interface

UART access to TEI0009 is available on 1x8 pin header J2. 

SchematicPin HeaderConnected to Voltage LevelNotes
TXDJ2Bank 13.3 V
RXDJ2Bank 13.3 V
UART interface information

Micro USB2.0 Connector

U14(FTDI FT2232) can be accessed through Micro USB2.0 B Receptacle 90 (J10).

SchematicConnected to Voltage LevelNotes
USB_VBUSGND

D-U14 (FTDI FT2232)3.3 V
D+U14 (FTDI FT2232)3.3 V
Micro USB2.0 B Receptacle 90 ° information

RJ45 Connectors

TEI0009 is equipped with two RJ45 connectors and two Ethernet PHYs. RJ45 connectors J8 and J9 are connected to Ethernet PHYs U17 and U19 respectively. .

PinSchematicETH1 PinETH2 PinNotes
TD+ETH_TX_PU17- TXPU19- TXP
CTETH_CTREF_TCT--Connected to GND
TD-ETH_TX_NU17- TXMU19- TXM
RD+ETH_RX_PU17- RXPU19- RXP
CTETH_CTREF_RCT--Connected to GND
RD-ETH_RX_NU17- RXMU19- RXM
LED GreenETH_LED0U17- NWAYENU19- NWAYEN
LED YellowETH_LED1U17- SPEEDU19- SPEED
RJ45 connectors information

D-Sub Connectors

TEI0009 is equipped with a D-Sub connector (Receptacle) which provides interface to Cyclone 10 LP through Bank 2.

SchematicCorresponding SignalsConnected toNotes
VGA_REDVGA_R0...3Bank 2Red channel
VGA_GREENVGA_G0...3Bank 2Green channel
VGA_BLUEVGA_B0...3Bank 2Blue channel
VGA_RGB_HSYNCVGA_HSBank 2Horizontal sync
VGA_RGB_VSYNCVGA_VSBank 2Vertical sync
VGA host socket information

On-board Peripherals

On board peripherals

QSPI Flash Memory

There is a 64MBit QSPI Flash memory (U12) provided by Winbond which can be used to store data or configuration.

PinSchematicConnected to Notes
CSF_CSBank 7 
CLKF_CLKBank 7 
IO0...3F_IO0...3Bank 7 
Quad SPI interface MIOs and pins

SDRAM Memory

The TEI0009 has 256 MBit volatile provided by Winbond , SDRAM IC(U10) for storing user application code and data. Up to 512 MBit SDRAM is possibleon other assembly option.

  • Part number: W9864G6JT-6-ND

  • Supply voltage: 3.3 V

  • Clock Frequency: 166MHz
  • Temperature: 0°C ~ 70°C

PSRAM Memory

The TEI0009 is integrated with 64Mbit Pseudo Static Random Access Memory (PSRAM) using a self-refresh DRAM array organized as 8M words by 8 bits. The device supports a HyperBus interface, Very Low Signal Count (Address, Command and data through 8 DQ pins), Hidden Refresh Operation, and Automotive Temperature Operation. 

  • Part number: IS66WVH8M8BLL

  • Supply voltage: 3.3 V

  • Clock Frequency: 100MHz
  • Temperature: -40°C ~ 85°C

7 Segment LED

The TEI0009 has a LED 7 Segment- 4 Digit which is connected to Bank 6.

PinSchematicConnected to Notes
A/L1SEG_CABank 6 
B/L2SEG_CBBank 6 
C/L3SEG_CCBank 6
DSEG_CDBank 6
ESEG_CEBank 6
FSEG_CFBank 6
GSEG_CGBank 6
DPSEG_CDPBank 6
A1SEG_ANBank 6
A2SEG_AN4Bank 6
A3SEG_AN3Bank 6
A4SEG_AN2Bank 6
L1-L3SEG_AN1Bank 6
LED 7 Segment pins

FTDI FT2232

The FTDI chip U14 converts signals from USB2.0 to a variety of standard serial and parallel interfaces. Refer to the FTDI data sheet to get information about the capacity of the FT2232H chip.
FTDI FT2232H chip is used in MPPSE mode for JTAG, 6 I/O's of Channel B are routed to FPGA bank 8 of the FPGA SoC and are usable for example as GPIOs, UART or other standard interfaces.

The configuration of FTDI FT2232H chip is pre-programmed on the EEPROM U15.

FTDI Chip PinSignal Schematic NameConnected toNotes
ADBUS0TCKBank 1JTAG interface
ADBUS1TDIBank 1
ADBUS2TDOBank 1
ADBUS3TMS

Bank 1

BDBUS0BDBUS0Bank 6
BDBUS1BDBUS1Bank 6
BDBUS2BDBUS2Bank 6
BDBUS3BDBUS3Bank 6
BDBUS4BDBUS4Bank 6
BDBUS5BDBUS5Bank 6
EECSEECSU15 (EEPROM)
EECLKEECLKU15 (EEPROM)
EEDATAEEDATAU15 (EEPROM)
OSCICK12MU16 (12MHz Oscillator)
DMD_NJ10 (Micro USB2.0)
DPD_PJ10 (Micro USB2.0)
FTDI chip interfaces and pins


Configuration Memory

On-board serial configuration memory (U5) is provided by Intel with 16 MBit (2 MByte) storage capacity. This non volatile memory is used to store initial FPGA configuration via JTAG interface. The memory is connected to FPGA bank 1 via active serial (AS) x1 interface.

Configuration Memory PinSignal Schematic NameConnected toNotes
DATA1AS_DATA0U1, Bank 1
Data out
DATA0AS_ASDOU1, Bank 1Data in
nCSAS_NCSU1, Bank 1chip select
DCLKAS_DCLK

U1, Bank 1

clock
FTDI and EEPROM pin connections

Ethernet PHY

The TEI0009 is equipped with two Ethernet PHY (U19, U17) which are connected to two RJ45 connectors. 

Ethernet PHY PinSignal Schematic NamesETH 1ETH 2Note
TXD0...3ETH_TXD0...3Bank 5Bank 5
TXCETH_TXCBank 5Bank 5
TXENETH_TXENBank 5Bank 5
RXD0...3ETH_RXD0...3Bank 5Bank 5
RXC//B-CAST_OFFETH_RXCBank 5Bank 5
RXER/ISOETH_RXERBank 5Bank 5
INTRP//NAND_TreeETH_INTRPBank 5

Bank 5


XIETH_CLKINU22 (Oscillator)U22 (Oscillator)
MDCETH_MDCBank 5Bank 5
MDIOETH_MDIOBank 5Bank 5
COL/CONFIG0ETH_COLBank 5Bank 5
CRS/CONFIG1ETH_CRSBank 5Bank 5
RXDV/CONFIG2ETH_RXDVBank 5Bank 5
LED0/NWAYENETH_LED0

Bank 5

J8B (RJ45- Green LED)

Bank 5

J9B (RJ45-Green LED)


LED1/SPEEDETH_LED1

Bank 5

J8C (RJ45-Yellow LED)

Bank 5

J9B (RJ45-Yellow LED)


nRSTETH_RSTBank 5Bank 5
RXMETH_RX_NJ8 (RJ45)J9 (RJ45)
RXPETH_RX_PJ8 (RJ45)J9 (RJ45)
TXMETH_TX_NJ8 (RJ45)J9 (RJ45)
TXPETH_TX_PJ8 (RJ45)J9 (RJ45)
Ethernet PHY connections and pins

EEPROM

TEI0009 has three EEPROM, U15, U18 and U20. U15 is pre-programmed by FTDI FT2232H configuration.

DesignatorEEPROM PinSignal Schematic NamesConnected to Notes
U15CSEECSU14 (FTDI)
CLK|EECLKU14 (FTDI)
DIN/DOUTEEDATAU14 (FTDI)FTDI Configuration
FTDI and EEPROM pin connections

DesignatorPinSchematicConnected to Grove HeaderNotes
U18, U20SCLI2C_SCLBank 6J5
SDAI2C_SDABank 6J5
I2C EEPROM interface MIOs and pins

I2C AddressDesignatorNotes
0x50U18
0x52U20
I2C address for EEPROM

ADC/DAC

The TEI0009 module is equipped with 12bit ADC/DAC (U2).

PinsSchematicConnected toNotes

nRESET

ADDA_RSTNU1, Bank 2VREF_ADC
nSYNCADDA_SYNCU1, Bank 2
SCLKMCLKU1, Bank 2
SDIMSDIU1, Bank 2
SDOMSDOU1, Bank 2
VREF-U1, Bank 2External reference is 1 V to 3.3V
Internal reference is 2.5 V
IO0...5AIN0...5

U1, Bank 1

J4, Pin header


ADC/DAC interface and pins

LEDs

SchematicDesignator ColorConnected toActive LevelNote
LED1...8D2...9RedBank 3High
LED_PB1D13...17RedBank 7High
CONF_DONED10RedBank 6Low
On-board LEDs

Clock Sources

DesignatorDescriptionFrequencyNote
U22MEMS Oscillator25 MHz
U16MEMS Oscillator12 MHz
Osillators

Power and Power-On Sequence

Power Supply

Power supply with minimum current capability of 1A for system startup is recommended.

Power Consumption

FPGATypical Current
Intel Cyclone 10 LP FPGATBD*
Power Consumption

* TBD - To Be Determined

Power Distribution Dependencies

Power Distribution

Power-On Sequence

There is no power on sequence, After power on, all regulators will be enabled as you can see in the diagram below.

Power Sequency

Voltage Monitor Circuit

There is a diod (D12) which protects the board from reverse polarity, Additionaly there is an Over/under voltage (IC) which protects the board from over voltage damages.

Voltage Monitor Circuit

Power Rails

Connector Designator

VCC / VCCIO Schematic Name

Pin DirectionNotes
J33.3V2,4Out
5V5Out
J53.3V3Out
Module power rails.

Bank Voltages

Bank          

Schematic Name

Voltage

Notes
Bank 1VCCIO13.3V
Bank 2

VCCIO2

3.3V
Bank 3 VCCIO33.3V
Bank 4VCCIO43.3V
Bank 5VCCIO53.3V
Bank 6VCCIO63.3V


Bank 7VCCIO73.3V


Bank 8VCCIO83.3V
Zynq SoC bank voltages.

Technical Specifications

Absolute Maximum Ratings

SymbolsDescriptionMinMaxUnitNote
VIN Input supply voltage-5.05.0V
VCCIOI/O buffers power supply-0.53.75V
VCCINTCore voltage-0.51.8V
VCCD_PLLPLL digital power supply-0.51.8V
VCCAPhase-locked loop (PLL) analog power supply-0.53.75V
V_ANAnalog Input Voltage on ADC/DAC (U2)-0.33.6V
V_DIGDigital Input Voltage on ADC/DAC (U2)-0.33.6V
V_REF_INInternal Reference Voltage Voltage on ADC/DAC (U2)-0.33.6V
V_REF_EXExternal Reference Voltage Voltage on ADC/DAC (U2)-0.33.6V
T_STGStorage Temperature-3585°CSee LTC2623WC datasheet
PS absolute maximum ratings

Recommended Operating Conditions

Operating temperature range depends also on customer design and cooling solution. Please contact us for options.

ParameterMinMaxUnitsReference Document
VIN 4.755.25V
VCCIO3.1353.465VSee Cyclone 10 LP datasheet.
VCCINT1.151.25VSee Cyclone 10 LP datasheet.
VCCD_PLL1.151.25VSee Cyclone 10 LP datasheet.
VCCA2.3752.625VSee Cyclone 10 LP datasheet.
V_AN03.3VSee  AD5592RBCPZ datasheet.
V_DIG03.3VSee  AD5592RBCPZ datasheet.
V_REF_IN13VSee  AD5592RBCPZ datasheet.
V_REF_EX2.452.55VSee  AD5592RBCPZ datasheet.
T_OP070°C

See SDRAM W9864G6JT datasheet

Recommended operating conditions.

Physical Dimensions

  • Module size: 95 mm × 110 mm.  Please download the assembly diagram for exact numbers.

  • PCB thickness: 1.6 mm.
Physical Dimension

Currently Offered Variants 

Trenz shop TE0728 overview page
English pageGerman page
Trenz Electronic Shop Overview

Revision History

Hardware Revision History


DateRevisionChangesDocument Link
2018-2-1901-REV01
2018-7-1802
  • Change J5 from SMD connector to GROVE connector
  • Connect clock 12 MHz to Bank 1
  • Connect I2C SLA/SDA to Bank 3
  • Remove SMA Coaxial straight J19,J20
  • Remove DIP Switch S1
  • Add 5 red LEDs
  • Add 2 Push buttons
  • Add 64 Mbit QSPI flash memory
  • Change SDRAM memory, 143 MHz to 166 MHz
  • Remove 10bit ADC
  • Remove 10bit DAC
  • Add 12bit DAC/ADC
  • Remove SMA Coaxial straight J19,J20
  • Remove SMA Coaxial straight J19,J20
  • Remove Tranciever USB
  • Remove DIP switch S2
  • Different Power Dependencies
  • Remove 24MHz Oscillator
  • Add 4x Pmod SMD host socket
REV02
Hardware Revision History

Hardware revision number can be found on the PCB board together with the module model number separated by the dash.

Board hardware revision number.

Document Change History

DateRevisionContributorDescription

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Document change history.

Disclaimer

Data Privacy

Please also note our data protection declaration at https://www.trenz-electronic.de/en/Data-protection-Privacy

Document Warranty

The material contained in this document is provided “as is” and is subject to being changed at any time without notice. Trenz Electronic does not warrant the accuracy and completeness of the materials in this document. Further, to the maximum extent permitted by applicable law, Trenz Electronic disclaims all warranties, either express or implied, with regard to this document and any information contained herein, including but not limited to the implied warranties of merchantability, fitness for a particular purpose or non infringement of intellectual property. Trenz Electronic shall not be liable for errors or for incidental or consequential damages in connection with the furnishing, use, or performance of this document or of any information contained herein.

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Copyright Notice

No part of this manual may be reproduced in any form or by any means (including electronic storage and retrieval or translation into a foreign language) without prior agreement and written consent from Trenz Electronic.

Technology Licenses

The hardware / firmware / software described in this document are furnished under a license and may be used /modified / copied only in accordance with the terms of such license.

Environmental Protection

To confront directly with the responsibility toward the environment, the global community and eventually also oneself. Such a resolution should be integral part not only of everybody's life. Also enterprises shall be conscious of their social responsibility and contribute to the preservation of our common living space. That is why Trenz Electronic invests in the protection of our Environment.

REACH, RoHS and WEEE

REACH

Trenz Electronic is a manufacturer and a distributor of electronic products. It is therefore a so called downstream user in the sense of REACH. The products we supply to you are solely non-chemical products (goods). Moreover and under normal and reasonably foreseeable circumstances of application, the goods supplied to you shall not release any substance. For that, Trenz Electronic is obliged to neither register nor to provide safety data sheet. According to present knowledge and to best of our knowledge, no SVHC (Substances of Very High Concern) on the Candidate List are contained in our products. Furthermore, we will immediately and unsolicited inform our customers in compliance with REACH - Article 33 if any substance present in our goods (above a concentration of 0,1 % weight by weight) will be classified as SVHC by the European Chemicals Agency (ECHA).

RoHS

Trenz Electronic GmbH herewith declares that all its products are developed, manufactured and distributed RoHS compliant.

WEEE

Information for users within the European Union in accordance with Directive 2002/96/EC of the European Parliament and of the Council of 27 January 2003 on waste electrical and electronic equipment (WEEE).

Users of electrical and electronic equipment in private households are required not to dispose of waste electrical and electronic equipment as unsorted municipal waste and to collect such waste electrical and electronic equipment separately. By the 13 August 2005, Member States shall have ensured that systems are set up allowing final holders and distributors to return waste electrical and electronic equipment at least free of charge. Member States shall ensure the availability and accessibility of the necessary collection facilities. Separate collection is the precondition to ensure specific treatment and recycling of waste electrical and electronic equipment and is necessary to achieve the chosen level of protection of human health and the environment in the European Union. Consumers have to actively contribute to the success of such collection and the return of waste electrical and electronic equipment. Presence of hazardous substances in electrical and electronic equipment results in potential effects on the environment and human health. The symbol consisting of the crossed-out wheeled bin indicates separate collection for waste electrical and electronic equipment.

Trenz Electronic is registered under WEEE-Reg.-Nr. DE97922676.


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