Update the XPS project

To use the "demo" application contained in TE0xxx-Reference-Designs\reference-TE0xxx\SDK\SDK_Workspace, you should:

• copy GitHub's "TE-EDK-IP" folder (from https://github.com/Trenz-Electronic/TE-EDK-IP) to the folder that contains the folder "reference-TE0xxx":

1. 1. C:\XilinxProject, if you have copied the folder "TE0xxx-Reference-Designs\reference-TE0xxx" to "C:\XilinxProject" ( "C:\XilinxProject\reference-TE0xxx" and "C:\XilinxProject\TE-EDK-IP");

   2. otherwise you must copy the contents of GitHub's 'TE-EDK-IP' folder inside the already existent empty folder "TE0xxx-Reference-Designs\TE-EDK-IP".

      From now on, the choice (a) is assumed.

      You should not alter folder nesting because is a Xilinx Platform Studio requirements

• click set_xxxx_project.bat to select your xxxx FPGA mounted on TE module;
• double click the system.xmp;
• the Xilinx Platform Studio should open
• you should click "Project" and then click "Project Options";
• under "Advanced Options (Optional) > Project Peripheral Repository Search Path" you must write (if it is not already written) "..TE-EDK-IP\"

• after this selection the XPS should appear like in this image.
• now you can cancel (or move in another folder) the content of TE0xxx-Reference-Designs\reference-TE0xxx\SDK\SDK_Export
• now you can copy all .c and .h files from TE0xxx-Reference-Designs\reference-TE0xxx\SDK\SDK_Workspace\demo\src in a temporary folder (C:\demo_src_TE for example)
• now you can cancel all files and folders from TE0xxx-Reference-Designs\reference-TE0xxx\SDK\SDK_Workspace
• to compile the project you must click "Project" and then "Export Hardware Design to SDK..."

Update the SDK project

When Xilinx SDK open, you should:

• click Xilinx "Xilinx Tools" and then "Repositories"
• after this a pop-up "Preferences" will appears
• click "New..." button of "Local Repositories (available to the current workspace)"
• select C.\XilinxProject\TE-EDK-IP
• click "Apply"
• you should click "OK"
• after this you must wait until the building procedure ended.
• You should click "File" >"New" > "Project"
• a pop up "New Project" will appears
• click"Xilinx">"Hardware Platform Specification", then next
• a new pop up "New Hardware Project" will appear
• under "Target Hardware Specification" click "Browse..." button
• a new pop up "Hardware Specification File" will appear
• select "system.xml", "C:\XilinxProject\reference-TE0300\SDK\SDK_Export\hw\system.xml"
• the FX2 microcontroller on the TE0300, TE0320 or TE0630 family should contain valid firmware before proceeding. If the FX2 microcontroller has not been programmed before, please follow the instructions in the ????? family User Manuals. You can use Cypress, Python OpenFut or C# OpenFutNet programs.
• If you are sure that the FX2 microcontroller is properly connected, you can connect to the TE0300/TE0320/TE0630 module with a JTAG adapter cable. We recommend using the Xilinx Platform Cable USB. Then connect the TE0300/TE0320/TE0630 module to a USB cable.

If the HDL design was successfully implemented and downloaded to the TE0300/TE0320/TE0630 family module, you can proceed to compile the MB software. Press the "build all user applications" button.

Run the demo project

Use the demo project with the XMD UART

fg

fdgs

Use the demo project without the XMD UART

To use the demo project without the XMD UART, you need to use "RS232" instead of "debug_module" as standard in/out port. Otherwise the application running on the Microblaze processor freezes if you disconnect the XMD. To accomplish that you need to set up the Microblaze "Software Platform Settings".

• In the dialog window select "OS and libraries" in the left window and pick "RS232" as a stdout and stdin interface.
• Then rebuild the software and download again the project to the FPGA.

The UART is then redirected to external pins, which are defined in the data/system.ucf file. The following snippet shows the case of the TE0300 series modules:

Module RS232 constraints*
Net fpga_0_RS232_RX_pin LOC=B13;
Net fpga_0_RS232_TX_pin LOC=B14;
Please refer to Table 1 for other module series relevant to this application note.

When application demo is compiled, you can click on the "Start XMD" button to download the hw_test application and open a UART terminal. 
Open the project by double-clicking on the system.xmp file. The Xilinx Platform Studio is opened. To compile the project press the "Download Bitstream to the FPGA" button.

Before running the demo application, open the #project_root#\xmd.ini file:
1.rst
2.dow sw/test_hw.elf
3.#dow sw/demo.elf
4.run
5.terminal -jtag_uart_server 4321
To run the demo application
uncomment line 3 (remove "#")
comment line 2 (add "#" as first character)
save xmd.ini.
type "exit" in XMD command window
restart XMD by clicking again the "Start XMD" button in the XPS toolbar.
With this application, you can test the PC ↔ FPGA communication using a provided API.
If you want to input some characters to the XMD UART, then open some terminal emulators, such as Microsoft / Hilgraeve HyperTerminal (usually included in Windows START MENU / All programs / Acessories / Communications / Hyper Terminal). Connect using the following settings:
No Host address
Port Number: 4321
TCP/IP connection type

• 1. 1. 1. 1. TE series	RS232_RX FPGA ball	RS232_RX module pin	RS232_TX FPGA ball	RS232_TX module pin
              TE0300	R6	J5-29	P6	J5-31
              TE0320	V17	J5-IO18	W17	J5-IO19
              TE0630	Y7	J5-29	AB7	J5-31
              TE0304	It doesn't apply	J1-3	It doesn't apply	J1-2
              TE0323	It doesn't apply	J4-35	It doesn't apply	J4-37
              host (PC)	TX	TX	RX	RX

              Table 1: location of UART pins examples.
              The UART settings are:
              bits per seconds: 115,200
              data bits: 8
              parity: none
              stop bits: 1
              flow control: none (otherwise you will not be able to enter commands)
              The UART port will output something of tis kind:
              -Entering main TE0300 DEMO ver 0x07010218-
              Setting up Interrupt Controller:
              Initialize exception handling
              Register external interrupt handler
              Register I2C_SLAVE interrupt handler
              Enable interrupts in the interrupt controller
              Start the interrupt controller
              Enabling and initializing instruction cache
              Enabling and initializing data cache
              Type:
              'a' RAM test
              'f' RAM Ftest
              'c' toggles caching
              'g' prints switches state and board revision
              't' starts TX transmission
              'r' starts RX transmission
              's' stops all transmissions
              'm' for the redraw menu
              MicroBlaze will work even in case the UART port is left unconnected.
              
              Sample UART to USB virtual COM port converter.
              
              
              Sample UART to USB virtual COM port converter: signal detail.