Table of contents


CPLD Access

  1. Connect MiniUSB cable to J28 XMOD (XMOD2 label)
  2. Set TEBF0808 DIP Switch S4-3 in ON position
  3. Power ON the board (ATX Power or external 12V)
  4. Run "Lattice Diamond Programmer"

  5. Select "Create new project from JTAG chain" and press "OK"

  6. Select Port: FTUSB-1
    After scan 2 MachXO2 devices should be detected in chain

  7. Select "LCMXO2-1200HC" as "Device" for both columns.

  8. In first column click to "File Name" and then to "...". Select "SCM_*.jed" file (Master CPLD File).

  9. In second column click to "File Name" and then to "...". Select "SCS_*.jed" file (SlaveCPLD File).

  10. Run "Design"->"Program" from main menu

  11. Wait operations to complete

Available CPLD Firmware

  • TEBF0818 CPLD- Firmware description with different Variants for PCB REV01 and newer
    • Default delivered Firmware (SCM_07A_default.jed/SCS_07A_default.jed)
    • Power Down Disabled (SCM_07B_powerdown_disabled.jed/SCS_07B_powerdown_disabled.jed) -can be used to power on with main power supply, if Jumper is add to J10-6 and J10-8 instead of Enclosure Button
    • MicroSD Boot Disabled (SCM_07C_msdboot_disabled.jed/SCS_07C_msdboot_disabled.jed) -for designs where microSD should not change the boot mode.
    • It's recommended to update always both CPLDs together

Download

  • TEBF0818/<PCB Revision>/Firmware/
    • Use files from the subfolders of your PCB revision

General instructions

CPLD Firmware Update - General Requirements

  • Lattice Diamond or Lattice Diamond Programmer is available for free on http://www.latticesemi.com/
  • Lattice compatible JTAG Programmer, for example:
    • Trenz TE0790 or Carrier with FTDI for JTAG
    • Most JTAG programmer, which used FTDI Chip to translate USB to JTAG
      • Digilent FTDI based programmer are not compatible with Lattice.
  • JTAG must be connected to CPLD JTAG
  • JTAG Enable Pin of CPLD must be selectable and set to VDD
  • Correct CPLD Firmware (JED-File) from Trenz Electronic Download

CPLD Firmware Update - General Procedure

Important:

  • Connect only one JTAG device to host PC.
  • Close all other JTAG programs, like Xilinx tools (on WinOS check hw_server.exe is terminated).

Procedure:

  1. Enable CPLD JTAG access (See JTAG section on CPLD Firmware description)
  2. Connect JTAG
  3. Power on System
  4. Open Lattice Diamond Programmer
  5. Detect Cable and click "Ok"
    For some devices second Port must be selected:
  6. Select Device (See CPLD Firmware overview description).
    In the most cases select the correct detected device one time (it's yellow at first on the menue)
  7. Select correct Firmware from Download Area (JED File)
  8. Program CPLD:
  9. Disable CPLD JTAG access (See JTAG section on CPLD Firmware description)
  10. Restart System

More Information are available on the CPLD Firmware description and on the readme.txt included into the download zip.


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