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TEG2000 mounted on the TE0703
This page showcases important details of the module-carrier combination TEG2000 + TE0703 and introduces the available script-based test designs to get the board up and running.
Hardware | Software |
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The module TEG2000 has Cologne Chip GateMate FPGA onboard that allows you to create extensive digital hardware designs.
Most of the FPGA IOs are spread arround the carrier. The TEG2000 is assembled with a QSPI non-volatile Flash memory(128 Mbit) and plenty of IOs which enable great hardware expandability. For communication and configuration the carrier offers a JTAG/UART Interface.
TEG2000 + TE0703 Hardware Blockdiagram
Basic IOs<->FPGA connections are as following, Table 1:
Color | Signal | FPGA Pin(Loc) | Function | |
---|---|---|---|---|
LED D2(on module) | green | LED1 | IO_SB_B4 | " |
Clock | -- | CLK_FPGA | IO_SB_A8/CLK0 | singled ended 25MHz clock |
Information on IO routing and FPGA pin connections can be found in the schematics.
Check the Jumper settings. Bank Voltages to 1.8V. Caution! 3.3V setting could destroy the module. The description of the DIP-switches on the carrier can be found here.