Skip to end of metadata
Go to start of metadata

You are viewing an old version of this page. View the current version.

Compare with Current View Page History

« Previous Version 6 Next »

TypeFile PrefixFile ExtentionExampleDescription
Application Note(s)AN-   
Assembly Diagram AD-.pdf AD-TE0715-02.pdf Assembly Diagrams with board dimension and connector position as pdf
Bill of MaterialsBOM-.csv, .pdf, .xlsx, .ods  
Cooler-STEP STEP- .zip (.step),.pdf,26923-TE0715-Heatsink.pdf Cooler 3D STEP (ISO 10303) model (.step) compressed as ZIP-file or pdf document
EDA library (file(s)) (.lib) TE0720 GigaZee Altium/Eagle Library Files (.lib) compressed as ZIP-file
EDA project (file(s))---.PRJ-xxx.zipTE0xxx-xx.PRJ-Altium.zipAltium/Eagle Project Files
EU declaration of conformityDoC-   
Gerber  Manufacturing files (Gerber files and numerical control drill files) compressed as ZIP-file
Operating InstructionsOI-   
Product BriefPB- (.step) PCB 3D STEP (ISO 10303) model compressed as ZIP-file
PCN PCN-.pdfPCN-20160114 TE0720-02 to TE0720-03, CPLD upgrade to REV05-v1-20160122_0830.pdfProduct change notifications
Pick and PlacePP-   
Schematics SCH-.pdf SCH-TE0726-02M.PDF PCB Schematic as pdf
System Controller ---.JEDSC0720_04_1AF.JED Firmware for PCB-CPLDs (Lattice FPGA). Free Programmer Software available on Lattice Semiconductor.
Trace LengthTL-.csv, .pdf, .xlsx, .ods 

PCB Trace Length

Technical Reference ManualTRM-.pdfTRM-TE0715-03-v1.0.pdf 
Vivado Design---.zipte0720-test_board-vivado_2016.2-build_03_20160630150948.zipZIP files with FPGA Reference Design as TCL script with Batch-Files to create the Vivado project.
Design- and Programmer Software available on Xilinx.
Attention: Only Programmer (LabTools) is freeware, but depending on FPGA, the Design-Software is not always free.
  • No labels