TEF1002 Getting Started

1. Attache 4x5 module to TEF1002
2. Select Voltage VCCA_SD of 4x5 module bank where SD-Card is connected by Jumper J7 (1-2 →3.3V; 2-3 1.8V). Compare TRM of actually used 4x5 module.
3. Select VCCIOA Voltage by setting J4 (1-2 →3.3V; 2-3 1.8V). If both FFA and FFB are not used any setting is ok. Do not leave open (communication of 4x5 module with TEF1002 CPLD is only possible with availabe VCCIOA)!

4. Select dip switch settings according to the attached 4x5 module and your needs:
   
   

   Dip	Setting	Note
   S1-1	OFF	FMC _VADJ OFF. The choice OFF, ON, OFF selects 1.8V FMC_VADJ, wich is a valid bank power for TE0720.
   S1-2	OFF
   S1-3	OFF
   S1-4	ON	Selects 4x5 module SOC/FPGA JTAG
   S1-5	ON
   S1-6	OFF
   S1-7	ON	Module  power enable.
   S1-8	ON	Use extended power sequenzing.
   S2-1	OFF/ON	For Zynq modules: Primary Boot Mode SD/QSPI.
   S2-2	OFF	ON for TE0720 (overide automatic enable FMC__VADJ). For TE0720 bank bank 34 has to be powerded to start up. Therefore FMC VADJ has to be set to a valid value e.g. 1.8V

5. Connect 12V ATX connector
6. Connect mico USB J10 to PC
7. Use Xilinx JTAG tools to programm FPGA or  for Zynq modules use micro SD Card.
8. Use e.g. Putty on PC to check for UART interactions.

TExxxx with TExxxx

Overview

Power supply

Single ??V power supply with minimum current capability of ??A is recommended to power on the board. 

DIP-Switches and Push Buttons

There is a switch (S??) which is connected to RESET signal, it resets the system entirely.

There is no DIPs on TExxxx. In case of TE0790 (XMOD) usage, see DIPs mode.

Jumpers

LEDs

There are three user LEDs which can be used for variant purposes.

JTAG/UART

JTAG and UART connections are available through mini USB connector.

Reference Designs

• TExxxx Reference Designs

Notes

• TExxxx Resources
• TExxxx Resources
• TExxxx Resources