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This demo provides an example on how to use the communication interface provided in the modules firmware
to setup the pre-amplification and trigger an ADC measurement. This measurement is converted to show
its value over time, and Fourier transformed, showing its frequency spectrum.

The download  of the demo contains the demo in a separate folder and the FPGA Design file.
The demo consist of two files, one is the notebook which contains the GUI and the other is a code module,
containing the functional part of the demo. These files must be in the same folder when running the demo.
The modules ADC is controlled via the Intel Max 10 FPGA. In shipment condition, the FPGA is programmed with
the necessary FPGA Design to run this demo.

Using the demo

This demo is designed with the focus of capturing signals. Therefore the module works like a storage
oscilloscope. After a trigger event, the module saves 1 million samples of ADC measurement in its SDRAM.

The demo scans for existing comports in its initialisation phase. So the module needs to be connected
to the computer prior to running the demo.

When this demo runs, it displays a graphical user interface, setup the comport, the demo automatically selects
the module. After this, the demo and the module can communicate.

The module offers a Non inverted input and an inverted input. The inputs is accessible through either
a SMA connection or a breakout connection.

Inverted inputs are J5 and -J8
Non inverted inputs are J6 and +J8

Now supply a signal to the inputs.

An other option is to use the modules square wave signal output. Connect the digital outputs D5 and D6 to
the inputs as you like and activate the signal through the checkbox.
Be careful, do not shorten the outputs D5 or D6 to ground.

One can set up a pre amplification gain of the input signal and the amount of samples to be processed.
By pressing the button Capture FFT data, the input signal will be plotted and shown.

Communicating with module:

To communicate with the module, a serial comport port with a speed set to 115200 bits needs to be opened.
Commands consists of a single character in UTF-8 encoding.
It is good practice to communication with the module following these steps:

  • Open a serial comport
  • Clear the PCs serial comport input buffer of the opened comport
  • Send the desired commands, each one in a single write operation to the comport
  • Close the serial comport as soon as possible

These steps apply also for read operations.

Using the ADC for high speed consecutive measurements

The module provides a method to gather highly accurate consecutive ADC measurements in a single event.
In this mode of operation, one mega sample of ADC values are performed and stored inside the modules

The following step should be taken in this mode:

  • Open a serial comport
  • Send the command "1", "2", "4" or "8" for the ADC pre-amplification
  • Send the command "t" to trigger the consecutive measurement.
    (The module always measures 1 MSample of data into its SD-RAM)
  • Clear the PCs serial comport input buffer of the opened comport
  • Send the command "+" or "*"to the module, it then transmits 128 or 16384 Samples of ADC values
  • Read the amount of ADC values in one chunk of 128 or 16384 samples from the PCs serial input buffer
    (Otherwise there is a high possibility of a misalignment of nibbles)
  • Repeat the reading of chunks to a maximum of 1 mega sample
  • Close the comport

After a trigger event, the one mega sample of data is stored until your retrigger. So processing the data can
be done for each chunk individually or the whole one mega sample.

Information to convert the RAW ADC data into standard integer values.

Module TEI0015 - AD4003BCPZ-RL7

Resolution: 18-bit in 5 nibbles
Maximum sampling rate: 2 MSPS

Order of Values:

Mid scale0x000000

Positive 1 LSB0x000011to full scale -1 LSB0x1ffff131071
Negative full scale0x20000131072to -1 LSB0x3FFFF262143

The layout of the ADC circuit is further described in the Analog Devices circuit note CN-0385.

Module TEI0016 - ADAQ7988 / ADAQ7980

Resolution: 16-bit in 4 nibbles
Maximum sampling rate: 0.5 MSps / 1 MSps

Order of Values:

Negative full scale is0x00000to -1 LSB0x7fff32767
Mid scale is0x8000 32768

Positive 1 LSB0x800132769to full scale0xffff65536

The layout of the ADC circuit is further described in the Analog Devices circuit note CN-0393.

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