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Table of Contents

Overview


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Refer to https://wiki.trenz-electronic.de/display/PD/TE0706+TRM for the current online version of this manual and other available documentation.

The Trenz Electronic TE0706 Carrier Board provides functionalities for testing, evaluation and development purposes of company's 4 x 5 cm SoMs. The Carrier Board is equipped with various components and connectors for different configuration setups and needs. The interfaces of the SoM's functional units and PL I/O-banks are connected via board-to-board connectors to the Carrier Board's components and connectors for easy user access.

See "4 x 5 cm carriers" page for more information about supported 4 x 5 cm SoMs.

Key Features

Additional assembly options are available for cost or performance optimization upon request.

Block Diagram

Figure 1: TE0706-02 block diagram.

Main Components

Figure 2TE0706-02 Carrier Board

  1. 5V power connector jack, J1
  2. Reset switch, S2
  3. USB2.0 type A receptacle, J7
  4. Micro SD card socket with Card Detect, J4
  5. 50 pin IDC male connector, J5
  6. 1000Base-T Gigabit RJ45 Ethernet MagJack, J3
  7. 1000Base-T Gigabit RJ45 Ethernet MagJack, J2
  8. XMOD JTAG- / UART-header, JX1
  9. User DIP-switch, S1
  10. VCCIO selection jumper block, J10 - J12
  11. External connector (VG96) placeholder, J6
  12. Samtec Razor Beam™ LSHM-150 B2B connector, JB1
  13. Samtec Razor Beam™ LSHM-150 B2B connector, JB2
  14. Samtec Razor Beam™ LSHM-130 B2B connector, JB3

Initial Delivery State

Board is shipped in following configuration:

Different delivery configurations are available upon request.

Signals, Interfaces and Pins

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Connections and Interfaces or B2B Pin's which are accessible by User
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B2B Connector

With the TE0706 Carrier Board's Board-to-Board Connectors (B2B) the MIO- and PL I/O-bank's pins and further interfaces of the mounted SoM can be accessed. A large quantity of these I/O's are also usable as LVDS-pairs. The connectors provide also VCCIO voltages to operate the I/O's properly.

Following table gives a summary of the available I/O's, interfaces and LVDS-pairs of the B2B connectors JB1, JB2 and JB3:

B2B ConnectorInterfacesCount of I/O'sNotes
JB1User I/O48 single ended or 24 differential-
GbE MagJack MDI8-
SD IO6-
MIO8-
SoM control signals5-
JB3GbE PHY RGMII18-
USB2.0 (OTG, device and host mode)5-
JB2User I/O18 single ended-
48 single ended or 24 differential-
JTAG4-
SoM control signals1-
MagJack J3 LED's2-

Table 1: General overview of PL I/O signals and SoM's interfaces connected to the B2B connectors.

On-board Connector

The TE0706 Carrier Board has and a 50-pin IDC male connector J5 and soldering pads as place-holder to mount a VG96 connectors J6 to get access the PL I/O-bank's pins and further interfaces of the mounted SoM. With these connectors, SoM's PL-I/O's are available to the user, a large quantity of these I/O's are also usable as  differential pairs.

Following table gives a summary of the pin-assignment, available interfaces and functional I/O's of the connectors J5 and J6:

On-board ConnectorControl Signals and InterfacesCount of I/O'sNotes
J5User I/O18 single ended-
14 single ended or 7 differential-
MIO8-
MagJack J2 LED's2-
J6

User I/O

82 single ended or 41 differential-
SoM control signals2'PGOOD', 'NOSEQ'

Table 2: General overview of PL I/O signals, SoM's interfaces and control signals connected to the on-board connectors.

JTAG Interface

JTAG access to the mounted SoM is provided through B2B connector JB2 and is also routed to the XMOD header JX1. With the TE0790 XMOD USB2.0 to JTAG adapter, the device of the mounted SoM can be programed via USB2.0 interface.

JTAG Signal

B2B Connector Pin

XMOD Header JX1Note
TCKJB2-100JX1-4-
TDIJB2-96JX1-10-
TDOJB2-98JX1-8-
TMSJB2-94JX1-12-

Table 3: JTAG interface signals.

UART Interface

UART interface is available on B2B connector JB1 and is usually established by MIO-pins of the PS-bank of the mounted SoM's Zynq device. With the TE0790 XMOD USB2.0 adapter, the UART signals can be converted to USB2.0 interface signals:

UART Signal Schematic NameB2BXMOD Header JB3Note
MIO14JB1-91JX1-7UART-RX (receive line)
MIO15JB1-86JX1-3UART-TX (transmit line)

Table 4: UART interface signals.

I²C Interface

One of the SoM's I²C interface is routed to the on-board connector J5 and is available to the user for general purposes:

I²C Signal Schematic NameB2BOn-board ConnectorNote
MIO11JB1-94J5-27I²C data line
MIO10JB1-96J5-28I²C clock line

Table 5: I²C interface signals.

SD IO Interface

The SD IO interface of the mounted SoM is routed to the on-board Texas Instruments TXS02612 SDIO port expander U4. This IC provides a necessary VDD/VCCIO translation between the MicroSD Card socket J4 (3.3V) and the SoM's Zynq device MIO-bank (1.8V):

SD IO Signal Schematic NameB2BConnected toNote
SD_DAT0JB1-24U4-6SD IO data
SD_DAT1JB1-22U4-7SD IO data
SD_DAT2JB1-20U4-1SD IO data
SD_DAT3JB1-18U4-3SD IO data
SD_CLKJB1-28U4-9SD IO clock
SD_CMDJB1-26U4-4SD IO command
MIO0JB1-88J4-9Card Detect signal

Table 6: SD IO interface signals.

USB2.0 Interface

TE0706-02 board has one physical USB2.0 type A socket J7, the differential data signals of the USB2.0 socket are routed to the B2B connector JB3, where they can be accessed by the corresponding USB2.0 PHY transceiver of the mounted SoM.

There is also the option to equip the board with a Micro USB 2.0 type B (receptacle) socket (J8) to the board as alternative fitting option. With this fitting option (Micro USB2.0 type B), the USB2.0 interface can also be used for Device mode, OTG and Host Modes.

For USB2.0 Host mode, the Carrier Board is additionally equipped with a power distribution switch U5 to provide the USB2.0 interface with the USB supply voltage USB-VBUS with nominal value of 5V. OTG mode is not available with USB2.0 Type A socket.

Following table gives an overview of the USB2.0 interface signals:

USB2.0 Signal Schematic NameB2BConnected toNote
OTG-D_N

JB2-48

J11-2, (J10-2)USB2.0 data
OTG-D_PJB2-50J11-3, (J10-3)USB2.0 data
OTG-IDJB2-52J11-4Ground this pin for A-Device (host),  left floating this pin for B-Device (peripheral).
VBUS_V_ENJB2-54U3, pin 4Enable USB-VBUS.
USB-VBUSJB2-56J11-1, (J10-1)USB supply voltage in Host mode.

Table 7: USB2.0 interface signals and connections.


Gigabit Ethernet Interface


The TE0706 Carrier Board is equipped with a Marvell Alaska 88E1512 Gigabit Ethernet PHY (U6), which provides in conjunction with the Gigabit Ethernet MagJack J2 a 1000Base-T Ethernet (GbE) interface. The I/O Voltage is fixed at 1.8V. The reference clock input of the PHY is supplied by on-board 25MHz oscillator (U7).

The GbE MegJack J2 has two integrated LEDs (both green), its signals are routed as MDI (Media Dependent Interface) to the GbE PHY.


PHY U6 pinsB2B-pinNotes
ETH-MDC/ETH-MDIOJB3-49, JB3-51-
PHY_LED0-Connected to GbE MagJack J2 LED0 (green). Also connected to J5-24 (PHY_LED0_CON).
PHY_LED1-Connected to GbE MagJack J2 LED1 (green). Also connected to J5-23 (PHY_LED1_CON).
PHY_INTJB3-33-
CONFIGJB3-60-
CLK125JB3-32PHY Clock (125 MHz) output.
ETH-RSTJB3-53-
RGMIIJB3-37 - JB-44,

JB3-47,

JB3-57 - JB-59

Reduced Gigabit Media Independent Interface.

12 pins.

SGMII-

Serial Gigabit Media Independent Interface.

Not connected.

MDI-

Media Dependent Interface.

Connected to Gigabit Ethernet MagJack J2.

Table 8: GbE interface signals and connections.

RJ45 Gigabit Ethernet MagJack J3

The TE0706-02 carrier board is also equipped with a second Gigabit-Ethernet MagJack J3, which is connected via MDI to the B2B connector JB1.

There is usually a corresponding Gigabit Ethernet PHY on 4 x 5 SoMs (e.g. TE0715 or TE0720), which can be used in conjunction with the baseboard MagJack J3.

GbE PHY Signal Schematic NameB2BConnected toNotes
PHY_MDI0_P

JB1-3

J3-2-
PHY_MDI0_NJB1-5J3-3-
PHY_MDI1_PJB1-9J3-4-
PHY_MDI1_NJB1-11J3-5-
PHY_MDI2_PJB1-15J3-6-
PHY_MDI2_NJB1-17J3-7-
PHY_MDI3_PJB1-21J3-8-
PHY_MDI3_NJB1-23J3-9-
ETH_LED1JB2-90Green MegJack J3 LED-
ETH_LED2JB2-99Green MegJack J3 LED-


Table 9: RJ45 GbE MagJack signals and connections.

XMOD FTDI JTAG-Adapter Header

The JTAG interface of the mounted SoM can be accessed via XMOD header JX1, which has a 'XMOD FTDI JTAG Adapter'-compatible pin-assignment. So in use with the XMOD-FT2232H adapter-board TE0790 the mounted SoM can be programmed via USB2.0 interface. The TE0790 board provides also an UART interface to the SoM's Zynq device which can be accessed by the USB2.0 interface of the adapter-board while the signals between these serial interfaces will be converted.

Following table describes the signals and interfaces of the XMOD header JX1:

JX1 pinSignal Schematic Net NameB2BNote
C (pin 4)TCKJB2-100-
D (pin 8)TDOJB2-98-
F (pin 10)TDIJB2-96-
H (pin 12)TMSJB2-94-
A (pin 3)MIO15JB1-86UART-TX (transmit line)
B (pin 7)MIO14JB1-91UART-RX (receive line)
E (pin 9)--not used
G (pin 11)--not used

Table 10: XMOD header signals and connections.

When using XMOD FTDI JTAG Adapter TE0790, the adapter-board's VCC and VCCIO will be sourced by the mounted SoM's 'VCCJTAG' (pin JB2-92). Set the DIP-switch with the setting:

XMOD DIP-switchesPosition
Switch 1ON
Switch 2OFF
Switch 3OFF
Switch 4ON

Table 11: XMOD adapter board DIP-switch positions for voltage configuration.

Use Xilinx compatible TE0790 adapter board (designation TE-0790-xx with out 'L') to program the Xilinx Zynq devices.

The TE0790 adapter board's CPLD have to be configured with the Standard variant of the firmware. Refer to the TE0790 Resources Site for further information and firmware download.

On-board Peripherals

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4-bit DIP-switch

Table below describes DIP-switch S1 settings for configuration of the mounted SoM:

SwitchSignal NameONOFFNotes
S1-1---Not connected.
S1-2PROGMODEJTAG enabled for programing mounted SoM's Zynq-SoC.JTAG enabled for programing mounted SoM's SC-CPLD.-
S1-3MODEDrive SoM SC CPLD pin 'MODE' low.Leave SoM SC CPLD pin 'MODE' open.

Boot mode configuration, if supported by SoM. (Depends also on SoM's SC-CPLD firmware).

S1-4EN1Drive SoM SC CPLD pin 'EN1' low.Drive SoM SC CPLD pin 'EN1' high.

Usually used to enable/disable FPGA core-voltage supply. (Depends also on SoM's SC CPLD firmware).

Note: Power-on sequence will be intermitted if S1-4 is set to OFF and if functionality is supported by SoM.

Table 12: DIP-switch S1 SoM configuration settings.

Figure 3: User DIP-switch S1

VCCIO Selection Jumper

Note: The corresponding PL I/O-bank supply-voltages of the 4 x 5 SoM to the selectable base-board voltages VCCIOA, VCCIOB and VCCIOC are depending on the mounted 4 x 5 SoM and varying in order of the used model.

Refer to the SoM's schematic for information about the specific pin assignments on module's B2B-connectors regarding the PL I/O-bank supply-voltages and to the 4 x 5 Module integration Guide for VCCIO voltage options.

The Carrier Board VCCIO for the PL I/O-banks of the mounted SoM are selectable by the jumpers J10, J11 and J12.

Following table describes how to configure the VCCIO of the SoM's PL I/O-banks with jumpers:

 Supply Voltage by JumperSupply Voltage by 0-Ohm ResistorSupply Voltage by Connector J6
Voltage Level1.8V3.3V1.8V3.3VVariable
VCCIOAJ10: 1-2, 3J10: 1, 2-3-R20J6 pin B32
VCCIOBJ11: 1-2, 3J11: 1, 2-3R29R21-
VCCIOCJ12: 1-2, 3J12: 1, 2-3R30R22J6 pin B1

Table 13: VCCIO jumper settings.

Figure 4: Base-board supply-voltages (VCCIOA, VCCIOB, VCCIOC) selection jumpers.

Only one supply-source is allowed to configure the base-board supply-voltages, either by jumper, by 0-Ohm-resistor or by connector J6. If a supply-voltage is configured by 0-Ohm-resistor or connector J6, then the corresponding configuration-jumper has to be removed. There aren't 0-Ohm-resistors and supply-voltages by connector J6 allowed if the corresponding base-board supply-voltage is configured by jumper. Vice versa jumpers and 0-Ohm-resistors have to be removed if supplying corresponding base-board supply-voltage by connector J6.

Note: If supplying base-board supply-voltages by connector J6, the module's internal 3.3V voltage-level on pins 9 and 11 of B2B-connector JB2 has to be reached stable state.

Take care of the VCCO voltage ranges of the  particular PL IO-banks (HR, HP) of the mounted SoM, otherwise damages may occur to the FPGA. Therefore, refer to the TRM of the mounted SoM to get the specific information of the voltage ranges.

It is recommended to set and measure the PL IO-bank supply-voltages before mounting of TE 4 x 5 module to avoid failures and damages to the functionality of the mounted SoM.

RTC Buffer Voltage Supply Header

The buffer voltage of the SoM's RTC can be supplied through the header J9 (VBAT-pin). Refer to the SoM's TRM for recommended voltage range and absolute maximum ratings.

Push Button

The Carrier Board's push button S2 is connected to the 'RESIN' signal, the function of the button is to trigger a reset of the mounted SoM by driving the reset-signal 'NRST_IN' to ground.

Power and Power-On Sequence

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Power Consumption

The maximum power consumption of the Carrier Board depends mainly on the mounted SoM's FPGA design running on the Zynq device.

Xilinx provide a power estimator excel sheets to calculate power consumption. It's also possible to evaluate the power consumption of the developed design with Vivado. See also Trenz Electronic Wiki FAQ.

Power InputTypical Current
5VINTBD*

Table 14: Typical power consumption.

 * TBD - To Be Determined soon with reference design setup.

Power supply with minimum current capability of 3A for system startup is recommended.

To avoid any damage to the module, check for stabilized on-board voltages and VCCIO's before put voltages on PL I/O-banks and interfaces. All I/Os should be tri-stated during power-on sequence.

Power Distribution Dependencies

The Carrier Board needs one single power supply voltage with a nominal value of 5V. Following diagram shows the distribution of the input voltage '5VIN' to the on-board components on the mounted SoM:


Figure 5: Board power distribution diagram.

Power Rails

The voltage direction of the power rails is from board and on-board connectors' view:

Module Connector (B2B) DesignatorVCC / VCCIODirectionPinsNotes
JB1

3.3V

Out

2, 4, 6, 14, 16

3.3V module supply voltage
VCCIOAOut10, 12PL IO-bank VCCIO
M1.8VOUTIn401.8V module output voltage
VBATOut80RTC buffer voltage
JB2

1.8V

Out

2, 4

1.8V module supply voltage
VCCIOBOut6PL IO-bank VCCIO
VCCIOCOut8, 10PL IO-bank VCCIO
M3.3VOUTIn9, 113.3V module output voltage
VCCJTAGIn923.3V JTAG VCCIO
JB3USB-VBUSOut56USB Host supply voltage

Table 15: Power pin description of B2B module connector.


On-board Connector DesignatorVCC / VCCIODirectionPinsNotes
J5

3.3V

Out

6, 45

3.3V module supply voltage
M3.3VOUTIn5, 463.3V module output voltage
J6

VCCIOA

Out

B32

PL IO-bank VCCIO
VCCIOCOutB1PL IO-bank VCCIO
M3.3VOUTInC323.3V module output voltage
3.3VOutC313.3V module supply voltage
5VINInA1, A2Carrier Board supply power

Table 16: Power Pin description of on-board connector.


Jumper / Header DesignatorVCC / VCCIODirectionPinsNotes
J10VCCIOAOut2-
1.8VOut1-
M3.3VOUTOut3-
J11

VCCIOB

Out2-
1.8VOut1-
M3.3VOUTOut3-
J12VCCIOCOut2-
1.8VOut1-
M3.3VOUTOut3-

Table 17: Power Pin description of VCCIO selection jumper pin header.


Main Power Jack and Pins DesignatorVCC / VCCIODirectionPinsNotes
J15VINIn

-

-
J65VINInA1, A2'5VIN' power supply to the Carrier Board as alternative to J1
J9VBATIn1Attention: Pin 2 connected to ground. VBAT voltage connected on this pin cause short-circuit.

Table 18: Main Power jack and pins description.


Peripheral Socket DesignatorVCC / VCCIODirectionPinsNotes
J7 / J8USB-VBUSOut1USB2.0 Type A socket / Micro USB2.0 B socket
J4M3.3VOUTOut4MikroSD Card socket VDD

Table 19: Power pin description of peripheral connector.


XMOD Header DesignatorVCC / VCCIODirectionPinsNotes
JX13.3V-5not connected
VIOOut6connected to 'VCCJTAG' (pin JB2-92)

Table 20: Power pin description of XMOD/JTAG Connector.

Board to Board Connectors

Variants Currently In Production

 Module Variant

Operating Temperature

USB2.0 SocketTemperature Range
TE0706-02-40°C to +85°CUSB2.0 Type A socket fittedIndustrial
TE0706-D-02-40°C to +85°CMicro USB2.0 Type B socket fittedIndustrial

Table 21: Board variants.

Technical Specifications

Absolute Maximum Ratings

Parameter

MinMax

Units

Reference Document

5VIN supply voltage

 -0.3 7

V

MP5010A, EN6347QI, EN5311QI data sheet

Storage temperature

 -55

+85

°C

Marvell 88E1512 data sheet

Table 22: Module absolute maximum ratings.

Recommended Operating Conditions

ParameterMinMaxUnitsReference Document
5VIN supply voltage 4.755.25 VUSB2.0 specification concerning 'VBUS' voltage
Operating temperature -40+85°C-

Table 23: Module recommended operating conditions.

Operating Temperature Ranges

Industrial grade: -40°C to +85°C.

The TE0706 Carrier Board itself is capable to be operated at industrial grade temperature range.

Please check the operating temperature range of the mounted SoM, which determine the relevant operating temperature range of the overall system.

Physical Dimensions

 All dimensions are given in millimeters.

Figure 6: Board physical dimensions drawing.

Revision History

Hardware Revision History

DateRevision

Notes

PCNDocumentation Link
2016-06-28

01

  • Prototypes
 -TE0706-01
-02
  • First Production Release
  • Refer to Changes list in Schematic

    for further details in changes to REV01

-TE0706-02

Table 24: Module hardware revision history.


Hardware revision number can be found on the PCB board together with the module model number separated by the dash.

Figure 7: Board hardware revision number.

Document Change History

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Date

Revision

Contributors

Description



Ali Naseri
  • TRM revision to new common style

2017-07-06

v.52
Ali Naseri, Jan Kumann
  • Hardware revision 02 specific changes.
2017-01-06v.1Ali Naseri
  • initial document to board revision 02

Table 25: Document change history.

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