Template Revision 1.0 - on construction For carrier - module combination, create main getting started page for carrier Design Name always "TE Series Name" +Getting Started, for example "TE0701 Getting started" and add carrier/module combination in the description → link on the module resource page also For whole board, use the board name, for example "TEBF0911 Getting Started" |
In this section you must explain how to power on the board and run the Reference Design (test board) on the particular module. The main points must be mentioned are: |
Table of Contents 
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Overview
Basic instructions to work with TEI0022.
Functionality of buttons, DIP switches, LEDs depends on CPLD Firmware. |
Board Overview
| Number | Note | Number | Note |
|---|
| 1 | U10 - Intel Cyclone V | 15 | J5 - Micro USB for UART |
| 2 | U26...27 - DDR3 for Fabric | 16 | U21 - USB to JTAG FTDI |
3 | U28...29 - DDR3 for HPS | 17 | J13 - Micro USB for JTAG |
| 4 | J4 - FMC | 18 | J7...10 / J15 / J17...18 - SMA Connector |
| 5 | P1...4 - PMOD | 19 | S1, S3...5 - Button |
| 6 | J3 - SD Card | 20 | LEDs |
| 7 | U1 - Ethernet PHY | 21 | S2 / S7...8 - DIP Switch |
| 8 | J1 - Ethernet RJ45 | 22 | J6 - Power Jack |
| 9 | U8 - USB PHY | 23 | U48 - Oscillator |
| 10 | U33 - USB HUB | 24 | U3 - Programmable Clock Generator |
| 11 | J2/ J12 - USB Connector | 25 | U6 - QSPI |
| 12 | U23 - HDMI Transmitter | 26 | U15 - QSPI |
| 13 | J11 - HDMI Connector | 27 | U54 - Power Monitoring |
| 14 | U41 - Intel MAX 10 | 28 | U38 - EEPROM |
Power supply
The input power supply must be mentioned. |
Single +12.0 V power supply is needed to power on the board at power jack J6. Current depends manly on design and cooling solution. Use Intel Power Estimator and/or Your Intel Quartus Prime Project to estimate min current. Minimum of 3A are recommanded for basic functionality.
DIP-Switches and Push Buttons
Explain all DIP switches functionality. |
There is a switch (S??) which is connected to RESET signal, it resets the system entirely.
| Overview 7 | Default | Description | Active Level |
|---|
| S4-1 | OFF | SoC PUDC, ON (low - internal FPGA pull ups enabled), OFF (high - internal FPGA pull ups disabled) |
| | S4-2 | OFF | N.C. |
| | S4-3 | OFF | JTAGEN ON (CPLD access), OFF (FMC access) |
| | S4-4 | ON | Enable on board 5V permanently |
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There is no DIPs on TExxxx. In case of TE0790 (XMOD) usage, see DIPs mode.
Jumpers
Explain all Jumpers functionality and connection. |
| Designator | Connected to | B2B | Note |
|---|
| Boot_R |
| Open: | | Short: |
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LEDs
Explain all user LEDs functionality and connections. |
There are three user LEDs which can be used for variant purposes.
| Designator | Color | Connected to | B2B | Active Level | Note |
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| Designator | Color | Connected to | Active Level | Note |
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| Designator | Color | Connected to | Active Level | Note |
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JTAG/UART
Explain JTAG or UART connection breifly. |
JTAG and UART connections are available through mini USB connector.
| Designator | Connected to | B2B Pin | XMOD Header JB? | Direction | Note |
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Reference Designs
In this Section you must refer to the Reference Design (Test board) for the particular module. For Example: TE0728 Reference Designs |
Notes
In this Section you must refer to the Resources Page for the particular module. For Example: TE0728 Resources |
