Requirements
All tricks can be done on Windows and Linux, this write-up details the commands of the windows approch
Linux commands are thanks to the use of cygwin nearly identical, but will be listed when differences exists
So should work for all users
Software:
- Intel® Quartus® Prime - Version 18.1 build 625
- Intel® SoC FPGA Embedded Development Suite (SoC EDS) - Version 18.1 build 625
- Linux Installation - As OS or as a Virtual Machine - Windows Subsystem for Linux is not suitable
Introduction
This write-up is intended to guide customers / users in their first steps in
BLABLA → Nutzer dabei zu Unterstützen eigene Designs für das Board zu entwickeln / Die Möglichkeiten / Ideen umzusetzen...
Users who intend to expand the hardware Fähigkeiten des Boards Änderungen des Bootprozesses ODER einfach nur einen
tieferen Einblick / leichten Einstieg in die Nutzung der Entwicklungsumgebung haben wollen..
Wird gezeigt, am BEISPIEL DER HARD
All steps can be performed under Windows, the write-up is ...
Table of content:
Page 1 - Intel Quartus Project
Begin -
Setup a project in Quartus, use the Plattform Designer to generate interconnection logic for the plattform / your design
Goal -
Compile the project to get the required files and folders in the next steps
[plattformDesigner.sopinfo file and (hps_isw_)handoff folder]
Page 2 - Generation of the pre and main bootloader / u-boot
Use the handoff folder to generate the preloader and main bootloader
[preloader-mkpimage.bin u-boot.img]
Page 3 - Generation of the Device Tree Blob
Use the plattformDesigner.sopinfo file to generate the device tree
[dts and dtb]