Requirements
This step by step guide covers the tools and console commands for Windows and Linux users.
All required Editors and tools are part of the Intel FPGA Design software packages.
Intels approach for making these Linux tools accessible to Windows users is the wrapper Cygwin.
Therefore console commands are nearly identical on Windows and Linux systems.
Only the low level access to the SD card can only be performed in a Linux environment.
Software:
- Intel® Quartus® Prime Lite - Version 18.1 build 625
- Intel® SoC FPGA Embedded Development Suite (SoC EDS) - Version 18.1 build 625
Erweiterung von Quartus Prime
- Linux Installation - As OS or as a Virtual Machine - Windows Subsystem for Linux is not suitable
Introduction
This guide has the objective to give users, with basic knowledge of computers, basic ideas of FPGAs and Software Design Tools,
a detailed Insight into the required steps to build and compile the necessary files to be able to boot the Hard Processor System
of a Cyclone V FPGA from a SD card. The HPS is chosen because it offers a limited amount of complexity and shows the basic
usage of many features from a FPGA Design.
The design process is separated along the usage of different programs and or tools. The output files and folders of one step are
essential for the next processing step. Each step in its own can offer complexity of varying degree on demand. This complexity can not be handled in a simple guide.
The usage of programs and tool will be described on point for the indented goal of booting the HPS.
Hopefully this guide helps
users on their first steps into a brighter knowledge of FPGA Design.
A detailed Insight into the use of the
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Step 1 - Intel Quartus Project
- Setup a project in Quartus Prime Lite (folder: project and project name: HPSexample)
- Use the Plattform Designer to configure the resources needed to boot the HPS
(System Memory and SD card access)
- Connect the basic interfaces (Uart and i²c) of the HPS to the board resources
- Compile the project to get the required files and folders for the next steps
HPSexample.sopinfo / PlattformEditorHPS.qip file and (hps_isw_)handoff folder
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Step 2 - Generation of the preloader and main bootloader from U-Boot sources
Use the handoff folder to generate the preloader and main bootloader
[preloader-mkpimage.bin u-boot.img]
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Step 3 - Generation of the Device Tree Blob
Use the plattformDesigner.sopinfo file to generate the device tree
[dts and dtb]
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Step 4 - SD card setup for Intel Cyclone 5 HPS
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Web sources:
Embedded Linux Beginners Guide
https://rocketboards.org/foswiki/Documentation/EmbeddedLinuxBeginnerSGuide
Introducing the Intel® Quartus® Prime Pro and Standard Edition Software User Guides
https://www.intel.com/content/www/us/en/programmable/products/design-software/fpga-design/quartus-prime/user-guides.html
Intel SoC FPGA Embedded Development Suite User Guide
https://www.intel.com/content/www/us/en/programmable/documentation/lro1402536290550.html
Intel® Soc EDS Support
https://www.intel.de/content/www/de/de/programmable/products/design-software/embedded-software-developers/soc-eds/support.html
Embedded Peripherals IP User Guide
https://www.intel.com/content/www/us/en/programmable/documentation/sfo1400787952932.html
SoC HPS System Generation
https://www.youtube.com/watch?v=8BehnPg8IvM
https://www.youtube.com/watch?v=L8FMSy7Uxjc
https://www.youtube.com/watch?v=vS7pvefsbRM
U-Boot
HPS SoC Boot Guide - Cyclone V SoC Development Kit
https://www.intel.com/content/www/us/en/programmable/documentation/lro1404103165481.html
Generating and Compiling the Preloader
https://rocketboards.org/foswiki/Documentation/AVGSRDPreloader
Building Bootloader
https://rocketboards.org/foswiki/Documentation/BuildingBootloader
Preloader and U-Boot Customization - v13.1
https://rocketboards.org/foswiki/Documentation/PreloaderUbootCustomization131
U-Boot programming: A tutorial -- Part I to III
http://xillybus.com/tutorials/uboot-hacking-howto-1
DTB
Device Tree Generation
https://rocketboards.org/foswiki/Documentation/DeviceTreeGenerator140