Table of contents
Available CPLD Firmware
- TEB0707 SC CPLD - Firmware description
CPLD Access and Programming
- Connect micro USB to PC.
- Connect 5V Power supply.
- Select CPLD JTAG by putting dip switch S1-4 in position ON.
- Export Serial Vector Format File (SVF)
- Open Project in Quartus Programmer and
- Go to menu: → "File" → "Create JAM, JBC, SVF or ISC File..."
- Select File format svf.
- Set TCK Frequenzy to 15 MHz.
- Export by clicking OK. If no other location was defined, the gernerated file is in the project folder.
Use MBFTDI SVF Player https://github.com/marsohod4you/MBFTDI-SVF-Player
- Sources and precompiled binaries are available. Download precompiled binary (mbftdi.exe) and save in the folder where your svf file is located.
- Close all programs which may connect to the used usb port (Quartus, Vivado/Vitis, Putty etc ...)
- Open Windows CMD and go to folder where svf file is located.
- Start Programming by typing: "mbftdi.exe top.svf" where top.svf is the exported svf file. Succesful programming looks like:
mbftdi v1.4 - burn MAX2 CPLD from Altera Vector Programming File *.svf
FTDI port to JTAG is used for programming
Usage example: mbftdi myfile.svf
Checking for FTDI devices...
2 FTDI devices found - the count includes individual ports on a single chip
Assume first device has the MPSSE and open it...
Device: Digilent Adept USB Device A
Hi-speed device (FT232H, FT2232H or FT4232H) detected
Configuring port for MPSSE use...
Frequency is set to 15MHz (FTDI clk divider 0001), requred 15MHz
JTAG program executed successfully.
Press <Enter> to continue