Skip to end of metadata
Go to start of metadata

Table of contents

Available CPLD Firmware

CPLD Access and Programming

  1. Connect micro USB to PC.
  2. Connect 5V Power supply.
  3. Select CPLD JTAG by putting dip switch S1-4 in position ON.
  4. Export Serial Vector Format File (SVF)
    1. Open Project in Quartus Programmer and
    2. Go to menu:  → "File" → "Create JAM, JBC, SVF or ISC File..."
    3. Select File format svf.
    4. Set TCK Frequenzy to 15 MHz.
    5. Export by clicking OK. If no other location was defined, the gernerated file is in the project folder.


  1. Sources and precompiled binaries are available. Download precompiled binary (mbftdi.exe) and save in the folder where your svf file is located.
  2. Close all programs which may connect to the used usb port (Quartus, Vivado/Vitis, Putty etc ...)
  3. Open Windows CMD and go to folder where svf file is located.
  4. Start Programming by typing:  "mbftdi.exe top.svf" where top.svf is the exported svf file. Succesful programming looks like:

d:/mbftdi.exe top.svf
mbftdi v1.4 - burn MAX2 CPLD from Altera Vector Programming File *.svf
FTDI port to JTAG is used for programming
Usage example: mbftdi myfile.svf

Checking for FTDI devices...
2 FTDI devices found - the count includes individual ports on a single chip
Assume first device has the MPSSE and open it...
Device: Digilent Adept USB Device A
Serial: 405436310724A
Hi-speed device (FT232H, FT2232H or FT4232H) detected
Configuring port for MPSSE use...
Frequency is set to 15MHz (FTDI clk divider 0001), requred 15MHz

JTAG program executed successfully.
Press <Enter> to continue

  • No labels