Table of Contents
The Trenz Electronic TEM0002-01 SmartBerry with Raspberry Pi form factor, is an industrial-grade module based on Microsemi SmartFusion2 SoC (System on a Chip). The Module has 128MB DDR3 SDRAM, a Gigabit Ethernet PHY, four Pmods, a GPIO Pin header compatible to the Raspberry Pi pinout and a Micro USB to UART interface. SmartFusion2 combines a 166 MHz Cortex-M3 core with 256 KByte Flash, 80 KByte SRAM and a 12 kLUT FPGA core logic.
- Microsemi SmartFusion2 SoC FPGA (M2S010)
- 128 MByte DDR3 SDRAM
- On board power converters for all needed voltages
- 40 pin header (compatible to Raspberry Pi pinout)
- 4 x 12 pin Pmods
- Gigabit Ethernet PHY with RGMII interface
- JTAG and UART via Micro USB
- 3 pin header for Live Probes
- 2 x User Button
- 2 x status LED
1 x RGB LED
Additional assembly options are available for cost or performance optimization upon request.
- Microsemi SmartFusion2 SoC FPGA, U2
- USB to UART/FIFO (FTDI FT2232H), U3
- Gigabit ETH connector, J2
- 4x 2x6 pin Pmod, P1, P2, P3, P4
- GPIO pin header compatible to Raspberry Pi, J8
- Micro USB 2.0, J1
- EEPROM 4KBIT (M93C66-R), U6
- 2x User Button, S4, S5
- RGB LED, D3
- LED red, D1 and green, D2
- Live Probe pins, J4
- Reset jumper, J13
- JTAG select jumper, J6
- Board power header, J5
- 1Gb DDR3/L SDRAM, U5
- MicroSD memory card connector, J3
- Gigabit Ethernet PHY, U1
Initial Delivery State
Storage device name
|Microsemi SmartFusion2 SoC FPGA, U2|
|EEPROM, U6||Programmed||FTDI (FT2232H) configuration data.|
Table 1: Initial delivery state of programmable devices on the module.
The SmartBerry supports configuration of the system via JTAG by the FTDI USB bridge.
Signals, Interfaces and Pins
26 I/O signals provided on the Rasperry Pi compatible header are connected to banks with 3.3V. Dpending on the configuration of the SoC, also GPIOs of the Microprocessor subsystem can be routet to the SoC Pins.
|FPGA SoC Signal||SOC Pin||Header Pin||Raspberry Pi Signal|
Table 2: General overview of I/O signals connected to the SoC.
Further I/Os are provided via the Pmod connectors descriebed below.
The module provides four 2x6 female Pmod connectors. Two of the headers (P2 and P3) are arranged to use as dual 12 pin Pmod. According to the standard on all four headers Pin 5 and 11 are connected to ground, 6 and 12 to 3.3V.
|FPGA SoC Signal||Pin|
Table 3: Overview of Pmod signals connected to the SoC.
JTAG access to the SoC components is provided through the micro usb connector via the FTDI usb to UART bridge. Depending on the jumper J6 the JTAGSEL signal SW3 switches the JTAG interface to either the FPGA fabric TAP (OPEN, high) or the Cortex-M3 JTAG debug interface (CLOSED, low). JTAG signals are powered by 3.3V.
Microsemi SmartFusion2 SoC pin
Table 4: JTAG interface signals.
SD Card Interface
The SD Card interface is connected to bank 2 of the SoC
|FPGA / SoC Pin||Connected To||Signal Name||Notes|
|U2-H16||J3-9||SD_CD||Card detect switch|
Table 5: SD Card interface signals and connections.
|PHY Pin||Signal||Microsemi SmartFusion2 SoC signal||Pin||Notes|
Table 6: Ethernet PHY signals and connections.
There are no on-board I2C devices. For Raspberry Pi compability the device detection I2C bus is routed from the header J8-27/28 to Bank 1 U2-A20/A19 (SDA/SCL).
|I2C Device||I2C Address||Notes|
|Header J8||0x50||Device detection/identification.|
Table 7: I2C slave device addresses.
TEM0002 has 1Gb industrial grade DDR3 SDRAM (U5). A 16-bit wide memory bus providing total of 128 MBytes of on-board RAM. Specification is 800 MHz clocking resulting in 1600 Mb/s data rate and timings of 11-11-11 (CL-TRCD-TRP).
Gigabit Ethernet PHY
On-board Gigabit Ethernet PHY (J2) is provided by Microsemi VSC8531 chip (U1). The Ethernet PHY RGMII interface is connected to bank 6 of the Microsemi SOC. I/O voltage is fixed at 1.5V. The reference clock input of the PHY is supplied from an external 25.000000 MHz oscillator (U11).
The module has following reference clock signals provided by on-board oscillators:
|Clock Source||Schematic Name||Frequency||Clock Destination|
|SmartFusion2 SoC U2 Main XTAL|
|Crystal ECX-31B||Y2||32.768 KHz||SmartFusion2 SoC U2 AUX XTAL|
|SiTime SiT8008AI oscillator||U11||25.000000 MHz||Gb Ethernet Copper PHY U1A|
|SiTime SiT8008AI oscillator||U14||25.000000 MHz|
SmartFusion2 SoC U2-Y12 Bank 4
Table 8: Reference clock signals.
1In REV02, Y1 will be replaced by a 12 MHz crystal.
|LED||Color||Connected to||SoC FPGA Signal||Description and Notes|
|D1||Red||U2-G16 Bank 1||MSIO21PB1|
|D2||Green||U2-G17 Bank 1||MSIO21NB1|
U2-H5 Bank 7, U2-F6 Bank 7, U2-H6 Bank 7
|MSIO80PB7, MSIO67PB7, MSIO81NB7|
|J2||Green, Yellow||U2-Y10 Bank 4, U2-U12 Bank 4||MSIO102PB4, MSIO110NB4||Ethernet: LED1A, LED1B|
|J2||Green, Yellow||U2-V14 Bank 4, U2-U14 Bank 4||MSIO115PB4, MSIO115PB4||Ethernet: LED2A, LED2B|
Table 9: On-board LEDs.
|Button||Connected to||SoC FPGA Signal|
|S4||U2-E17 Bank 1||MSIO24PB1|
|S5||U2-E16 Bank 1||MSIO24NB1|
Table 10: On-board Buttons.
Power and Power-On Sequence
There is no specific power on Sequence. Just supply with 5V via the micro USB J1 or the J5 PWR_IN with current rating sufficient for your Design.
The maximum power consumption of a module mainly depends on the design running on the FPGA.
|Power Input||Typical Current|
Table 11: Typical power consumption.
* TBD - To Be Determined soon with reference design setup.
Power supply with minimum current capability of ...A for system startup is recommended.
For the lowest power consumption and highest efficiency of the on-board DC-DC regulators it is recommended to power the module from one single 3.3V supply. All input power supplies have a nominal value of 3.3V. Although the input power supplies can be powered up in any order, it is recommended to power them up simultaneously.
Power Distribution Dependencies
Power Rail Name
|VIN||J5-1||Input||Main supply voltage.|
Table 12: Module power rails.
Table 13: I/O bank voltages.
Variants Currently In Production
|Module Variant||FPGA / SoC|
|TEM0002-01||M2S010||0°C to +70°C||commercial|
Table 14: Module variants.
Absolute Maximum Ratings
VIN supply voltage
Table 15: Module absolute maximum ratings.
1Boundary determined by the specification of the buttons, all other components have at least a range of -40°C to 85°C.
Recommended Operating Conditions
|VIN supply voltage||2.4||5.5||V||-|
Table 16: Module recommended operating conditions.
1Upper bound is determined by the buttons, all other components have at least a upper bound of 85 °C.
Operating Temperature Ranges
Module operating temperature range depends also on customer design and cooling solution. Please contact us for options.
Module size: 85 mm × 56 mm. Please download the assembly diagram for exact numbers.
PCB thickness: 1.55 mm.
Highest part on PCB: top approx. 13.3 mm (Ethernet), bottom 1.57mm (SD-Card)Please download the step model for exact numbers.
All dimensions are given in millimeters.
Hardware Revision History
Table 17: Module hardware revision history.
Hardware revision number can be found on the PCB board together with the module model number separated by the dash.
Figure 5: Module hardware revision number.
Document Change History
Jan Kumann, John Hartfiel
Table 18: Document change history.
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