| Description | Min | Max | Unit | Notes |
|---|
VIN supply voltage | -0.3 | 7 | V | See EN6347QI and TPS82085SIL datasheets |
| 3.3VIN supply voltage | -0.1 | 3.630 | V | Xilinx DS925 and TPS27082L datasheet |
| PS I/O supply voltage, VCCO_PSIO | -0.5 | 3.630 | V | Xilinx document DS925 |
| PS I/O input voltage | -0.5 | VCCO_PSIO + 0.55 | V | Xilinx document DS925 |
| HP I/O bank supply voltage, VCCO | -0.5 | 2.0 | V | Xilinx document DS925 |
| HP I/O bank input voltage | -0.55 | VCCO + 0.55 | V | Xilinx document DS925 |
| HD I/O bank supply voltage, VCCO | -0.5 | 3.4 | V | Xilinx document DS925 |
| HD I/O bank input voltage | -0.55 | VCCO + 0.55 | V | Xilinx document DS925 |
| PS GTR reference clocks absolute input voltage | -0.5 | 1.1 | V | Xilinx document DS925 |
| PS GTR absolute input voltage | -0.5 | 1.1 | V | Xilinx document DS925 |
Voltage on SC CPLD pins | -0.5 | 3.75 | V | Lattice Semiconductor MachXO2 datasheet |
Storage temperature | -40 | +85 | °C | See eMMC datasheet |