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Online version of this manual and other related documents can be found at https://wiki.trenz-electronic.de/display/PD/TE0715TE0703

The Trenz Electronic TE0703 is...TE0701 Carrier Board is a base-board 4x5 SoMs, which exposes the MIO- and the PS/PL-pins of the SoM to accessible connectors and provides a whole range of on-board-componentes to test and evaluate Trenz Electronix 4x5 SoMs.

See page "4 x 5 cm carriers" to get information about the SoMs supported by the TE0703 Carrier Board.

Block Diagram

Main Components

Key Features

Is it needed?

Main Components

Image Added

Samtec Razor Beam™ high-speed hermaphroditic 50 positions terminal strip, board to board connector, JB1
Samtec Razor Beam™ high-speed hermaphroditic 50 positions terminal strip, board to board connector, JB2
Samtec Razor Beam™ high-speed hermaphroditic 30 positions terminal strip, board to board connector, JB3
Micro SD card socket with detect switch, J3
LED indicators D1 and D2
Mini-USB B connector, J4
LED indicators D3 and D4
Configuration DIP switches, S2 (see table under ... section)
User push button(Reset), S1
Backplane connector(VG96) placeholder, J1
Backplane connector(VG96) placeholder, J2
VCCIO voltage selection jumper block, J5, J8, J9 and J10 (see Power section)
Trxcom 1000Base-T Gigabit RJ45 Magjack, J14
USB type A receptacle, J6 (optional micro USB 2.0 type B receptacle available, J12)
5VDC power connector jack, J13

Key Features

2 x VG96 backplane connectors (mounting holes and solder pads)
SDIO port expander with voltage-level translation
Micro SD card socket, can be used to boot system
4 x user LEDs, 2 x red and 2 x green
Mini USB connector (USB JTAG and UART interface)
1 x user-push button routed to CPLD. By default it is configured as system reset button.
RJ45 Gigabit Ethernet socket with 4 integrated LEDs.
USB Host Connector
Barrel jack for 5V Power Supply input
4A High-Efficiency Power SoC DC-DC Step-Down Converter(Enpirion EN6347) for 3.3V Power Supply
Trenz 4x5 Module Socket (3 x Samtec LSHM series connectors)
USB JTAG and UART Interface (FTDI FT2232H), compatible with Xilinx Tools (also with many other tools)
2 x User configurable DIP switches

...

Interfaces and Pins

Board to Board (B2B) I/O's

For detailed information about the B2B pin out, please refer to the Master Pinout Table.

Ethernet

USB Interface

JTAG Interface

JTAG access to the Xilinx is provided through B2B connector JM2.

JTAG Signal	B2B Connector Pin
TCK	JM2-99
TDI	JM2-95
TDO	JM2-97
TMS	JM2-93

Note
JTAGEN pin in B2B connector JM1 should be kept low or grounded for normal operation.

System Controller I/O Pins

Special purpose pins are connected to smaller System Controller CPLD and have following default configuration:

Pin Name	Mode	Function	Default Configuration
EN1	Input	Power Enable	No hard wired function on PCB, when forced low pulls POR_B low to emulate power on reset.
PGOOD	Output	Power Good	Active high when all on-module power supplies are working properly.
NOSEQ	-	-	No function.
RESIN	Input	Reset	Active low reset, gated to POR_B.
JTAGEN	Input	JTAG Select	Low for normal operation.

Boot Mode Pin

By default the TE-0715 supports QSPI and SD Card boot modes which is controlled by the MODE input signal from the B2B connector.

MODE Signal State	Boot Mode
high or open	SD Card
low or ground	QSPI

LED's

LED

Color

Connected to

Description and Notes

D2

Green

DONE

Reflects inverted DONE signal, ON when FPGA is not configured,

OFF as soon as PL is configured.

This LED will not operate if the SC can not power on the 3.3V output

rail that also powers the 3.3V circuitry on the module.

D3

Red

SC

System main status LED.

D4

Green

MIO7

User controlled, default OFF (when PS7 has not been booted).

Micro SD Card Socket

Micro SD Card socket is not directly wired to the B2B connector pins, but through a Texas Instruments TXS02612 SDIO port expander, which is needed for voltage translation due to the different voltage levels of the Micro SD Card and MIO bank 501 of the Xilinx Zynq 7000 chip. The Micro SD Card has 3.3V signalling, but the MIO Bank 501 on the Xilinx Zynq 7000 chip is set to 1.8V. !!! (card detect signal...)

Dual channel USB UART/FIFO

TE0703 has on-board USB 2.0 High Speed UART/FIFO FT2232HQ from FTDI. Channel A can only be used in simple UART mode, Channel B can be used as UART, in 245 FIFO, JTAG(MPSSE) or High Speed Serial modes. An standard 256 Byte EEPROM to store custom Configuration settings for FT2232H is available. EEPROM settings can be changed using FTDI provided tools that can be downloaded from FTDI website. See FTDI website for more information.

Ethernet

On-board ethernet jack J14 pins are routed to B2B connector JB1. Ethernet jack J14 LED's are all routed to CPLD Bank 1. !!! (citation needed, what is going on inside the CPLD with LED signals).

USB Interface

TE0703 board has two physical USB sockets:

J4 as mini USB type B socket wired to on-board FTDI FT2232H chip.
J6 as USB type A wired to B2B connector JM3(there is usually something like SMSC USB3320 or similar USB transceiver on the module).

JTAG Interface

JTAG access to the CPLD and Xilinx Zynq chip is provided via Mini-USB JTAG Interface (FTDI FT2232H) and controlled by DIP switch S2-3.

LED's

There are four LED's onboard:

LED	Color	Description
D1	Red	FTDI UART receive activity
D2	Green	FTDI UART transmit activity
D3	Red	FL_0
D4	Green	FL_1

LED's D3 and D4 are connected to the 4x5 B2B connector pins. Those LEDs can be controlled by FPGA Module

DIP switches

Switch	ON	OFF
S2-1	User configurable, routed to CPLD	User configurable, routed to CPLD
S2-2	User configurable, routed to CPLD	User configurable, routed to CPLD
S2-3	JTAG enabled for B2B connector JB2	JTAG enabled for CPLD
S2-4	Boot from SD Card	Boot from SPI flash on module

...

Power

Power Supply

Power supply with minimum current capability of 3A for system startup is recommended.

Power Consumption

Power Input Pin	Max Current
VIN	TBD*

* TBD - To Be Determined soon with reference design setup.

* 07.09.2016: TE0703-05 + TE0715-01 module. SD micro card inserted. Ethernet connected, link up. System booted into Linux prompt and idling. Average power consumption was 5V/0.55A.

VCCIO voltage selection jumpers J5, J8, J9 and J10

Refer to the 4x5 Module Integration Guide for VCCIO voltage options.

If you choose to power IO banks

Image Added

Jumper J5	1-2	2-3	Voltage
VCCIOA	ON	OFF	1.8V
VCCIOA	OFF	ON	3.3V

Jumper J8	1-2	2-3	Voltage
VCCIOB	ON	OFF	1.8V
VCCIOB	OFF	ON	3.3V

Jumper J9	1-2	2-3	Voltage
VCCIOC	ON	OFF	1.8V
VCCIOC	OFF	ON	3.3V

Jumper J10	1-2	2-3	Voltage
VCCIOD	ON	OFF	1.8V
VCCIOD	OFF	ON	3.3V

Initial Delivery State

Board is shipped in following configuration:

VCCIO voltage selection jumpers are all set to 1.8V.
S1 switch configured as reset button in CPLD.
Two VG96 backplane connectors are not soldered to the board, but they are included in the package as separate components.
S2 DIP switches are configured as follows:

Switch	Position	Description
S2-1	ON	Mode control MC1.
S2-2	ON	Mode control MC0.
S2-3	ON	JTAG enabled for B2B JB1 connector.
S2-4	OFF	Boot mode set to SD Card.

Different delivery configurations are available upon request.

Technical Specifications

Absolute Maximum Ratings

...

Note
Assembly variants for higher storage temperature range are available on request.

Note
Please check Lattice datasheet .... components datasheets for complete list of absolute maximum and recommended operating ratings.

Recommended Operating Conditions

....

Physical Dimensions

Board size: mm × mm. PCB 100mm × 64.5mm. Notice that the mini USB-B jack on the left and ethernet RJ-45 jack on the right are hanging slightly over the edge of the PCB making the total width of the longer side approximately 106mm. Please download the assembly diagram for exact numbers.
Mating height of the module with standard connectors: 8mm
PCB thickness: 1.6mm65mm
Highest part parts on PCB: approx. 2.5mm. the PCB are USB type A jack and ethernet RJ-45 jack, approximately 15mm. Please download the step model for exact numbers.

All dimensions are given in mm.

Image Added

Operating Temperature Ranges

...

Board operating temperature range depends also on customer design - and cooling solution. Please contact us for options.

Weight

.. g 42g - Plain board.. g - Set of bolts and nuts

13g - VG96 connector x 2

Document Change History

Date	Rrevision	Contributors	Description

2016-

06

-28

New overall document layout with shorter table of contents.

Revision 01 PCB pictures replaced with the revision 03 ones.

Fixed link to Master Pinout Table.

New default MIO mapping table design.

Revised Power-on section.

Added links to related Xilinx online documents.

Physical dimensions pictures revised.

Revision number picture with explanation added.

2016-04-27V33

Philipp Bernhardt, Antti Lukats,

Thorsten Trenz, Emmanuel Vassilakis

Added the table "Recommended Operating Conditions"

Storage Temperature edited.

2016-03-31V10

Philipp Bernhardt, Antti Lukats,

Thorsten Trenz

Initial version

.09.2016

Something...

Hardware Revision History

Date	Revision	Notes
-	01	Prototypes
-	02
-	03
-	04

10

07.

08

09.2016

05

Hardware revision number is printed on the PCB board together with next to the module model number separated by the dash.

Disclaimer

Include Page

	IN:Include Legal Notices
	IN:Include Legal Notices

Trenz Electronic Documentation

Versions Compared

Old Version 1

New Version 2

Key

Block Diagram

Main Components

Key Features

Main Components

Key Features

Interfaces and Pins

Board to Board (B2B) I/O's

Ethernet

USB Interface

JTAG Interface

System Controller I/O Pins

Boot Mode Pin

LED's

Micro SD Card Socket

Dual channel USB UART/FIFO

Ethernet

USB Interface

JTAG Interface

LED's

DIP switches

Power

Power Supply

VCCIO voltage selection jumpers J5, J8, J9 and J10

Initial Delivery State

Technical Specifications

Absolute Maximum Ratings

Recommended Operating Conditions

Physical Dimensions

Operating Temperature Ranges

Weight

Document Change History

Hardware Revision History

Disclaimer