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Table of Contents
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The Carrier Board provides soldering-pads for VG96 connectors as place-holders to get access to the PL-IO-banks and other functional units of the mounted SoM.
Additional assembly options are available for cost or performance optimization upon request.
Figure 1: TEB0729-02 block diagram.
Figure 2: TEB0729-02 main components.
Storage device name | Content | Notes |
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Configuration EEPROM, U1 | Empty | Not programmed |
Configuration EEPROM, U2 | Empty | Not programmed |
Table 1: Initial delivery state of programmable devices on the module.
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The TEB0729 Carrier Board's Board-to-Board Connectors (B2B) have the same pin-assignment as the mounted Zynq SoM due to its hermaphroditic structure. By this connectors, the MIO- and PL-IO-bank's pins and further interfaces of the Zynq SoM can be accessed. A large quantity of these I/O's are also usable as LVDS-pairs. The connectors provide also VCCIO voltages to operate the I/O's properly.
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Table 2: General overview of PL I/O signals and SoM's interfaces connected to the B2B connectors.
The TEB0729 Carrier Board has soldering pads provides as place-holders to mount VG96 connectors J8 and J9 to get access the PL-IO-bank's pins and further interfaces of the Zynq SoM. With mounted VG96 connectors, SoM's IO's are available to the user, a large quantity of these I/O's are also usable as LVDS-pairs.
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Table 3: General overview of PL I/O signals, SoM's interfaces and control signals connected to the VG96 connectors.
1) The pins with the schematic net names 'NRST_IN' (JB2-89) and 'NRST_OUT' (JB2-91) are swapped as part of a HW-modification to rework the Reset-signals of the Carrier-Board in conjunction with the TE0729 SoM.
Refer to the SC CPLD documentation, section "Watchdog" to get further detailed information about the Reset-functionality of the Carrier Board and SoM before and after the HW-modification and the required SC CPLD firmware revision of the TE0729 SoM for each version of the SoM.
JTAG access to the mounted SoM is provided through B2B connector JB2 and is also routed to the XMOD header JB3. With the TE0790 XMOD USB2.0 to JTAG adapter, the Zynq chip on the mounted SoM can be programed via USB2.0 interface.
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Table 4: JTAG interface signals.
UART interface is available on B2B connector JB2. With the TE0790 XMOD USB2.0 adapter, the UART signals can be converted to USB2.0 interface signals:
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Table 5: UART interface signals.
Two I²C interfaces are provided on B2B connector JB2. I²C0 interface is connected to the Configuration EEPROMs U1 and U2 and is dedicated to these on-board peripherals. Interface I²C1 is routed to the VG96 connector J9 and is available to the user for general purposes:
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Table 6: I²C interface signals.
The SD IO interface of the SoM's Zynq chip (MIO-bank) is routed to the on-board MicroSD Card socket J1. By this interface, the Zynq chip can be booted from an inserted MicroSD Card:
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Table 7: SD IO interface signals.
The TEB0729 Carrier Board is equipped with a Micro USB2.0 B (receptacle) socket J11 with board-revision TEB0729-02B, USB2.0 Type A socket is fitted on board-revision TEB0729-02A.
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Table 8: USB2.0 interface signals and connections.
The TEB0729 Carrier Board is fitted with one RJ-45 Gigabit Ethernet Magnetic jack J3. The MegJack has two integrated LEDs (both green), its signals are routed as MDI (Media Dependent Interface) to the B2B connector JB2, where they can be accessed by the GbE PHY transceiver of the mounted SoM:
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Table 10: GbE SGMII signals and connections.
The TEB0729 Carrier Board is also fitted with two additional RJ-45 MegJacks providing 10/100-BaseT Ethernet interfaces. This interfaces are routed to the B2B connector JB2
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Table 11: 10/100-BaseT Ethernet interfaces signals and connections.
The JTAG interface of the mounted SoM can be accessed via header JB3, which has a 'XMOD FTDI JTAG Adapter'-compatible pin-assignment. So in use with the XMOD-FT2232H adapter-board TE0790 the mounted SoM can be programmed via USB interface. The TE0790 board provides also an UART interface to the Zynq SoM which can be accessed by the USB2.0 interface of the adapter-board while the signals between these serial interfaces will be converted. The adapter-board offers also two GPIO's, one with an indication LED (pin JB3-9 (E)) and another one with a low-active push button (pin JB3-11 (G)).
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Table 13: XMOD module DIP-switch positions for voltage configuration.
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The TEB0729 Carrier Board is equipped with two Configuration EEPROMs U1 and U2 from Microchip.
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The Configuration EEPROMs are connected to the I²C0 interface of the Zynq's MIO-bank via B2B connector JB2.
Table below describes DIP-switch S2 settings for configuration of the mounted SoM:
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Table 14: DIP-Switch S2 SoM configuration settings.
If TE0729 is mounted, following bootmodes can be configured by setting the DIP-switches S2-2 and S2-3:
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The selected bootmode via DIP-switch S2 depends also on the current configured SC CPLD firmware on the mounted SoM and may vary.
The Carrier Board VCCIO for the PL IO-banks of the mounted SoM are selectable by the jumpers J6 and J7.
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Table 16: VCCIO jumper settings.
The buffer voltage of the SoM's RTC can be supplied through the header J2. Refer to the SoM's TRM for recommended voltage range and absolute maximum ratings.
The Carrier Board's push button S1 is connected to the 'NRST_IN' signal, the function of the button is to trigger a reset of the mounted SoM by driving the reset-signal 'NRST_IN' to ground.
LED | Color | Connected to | Description and Notes |
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D1 | Red | 'MIO9', pin JB2- 88 | user LED |
Table 17: On-board LEDs.
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The maximum power consumption of the Carrier Board depends mainly on the mounted SoM's FPGA design running on the Zynq chip.
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To avoid any damage to the module, check for stabilized on-board voltages and VCCIO's before put voltages on PL I/O-banks and interfaces. All I/Os should be tri-stated during power-on sequence. |
The Carrier Board needs one single power supply voltage with a nominal value of 5V. Following diagram shows the distribution of the input voltage '5VIN' to the on-board components on the mounted SoM:
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Figure 3: Board power distribution diagram.
Module Connector (B2B) Designator | VCC / VCCIO | Direction | Pins | Notes |
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JB1 | VIN33 | Out | Pin 1, 2, 3, 4, 5, 6 | 3.3V module supply voltage |
VCCIO_13 | Out | Pin 101, 102 | PL IO-bank VCCIO | |
VCCIO_33 | Out | Pin 29, 30 | PL IO-bank VCCIO | |
3.3V | In | Pin 65, 66 | voltage output from module | |
JB2 | 1.8V | In | Pin 49 | voltage output from module |
2.5V | In | Pin 13 | voltage output from module | |
USB-VBUS | Out | Pin 107 | USB Host supply voltage | |
VBAT_IN | Out | Pin 118 | RTC buffer voltage |
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Table 23: Power pin description of XMOD/JTAG Connector.
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Module Variant | Operating Temperature | USB Socket | Temperature Range |
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TEB0729-02-A | -40°C to +125°C | USB2.0 Type A socket fitted | Industrial |
TEB0729-02-B | -40°C to +125°C | Micro USB2.0 B socket fitted | Industrial |
Table 24: Module variants.
Parameter | Min | Max | Units | Reference Document |
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5VIN supply voltage | -0.3 | 7 | V | MP5010A, EN6347QI data sheet |
Storage temperature | -65 | 150 | °C | - |
Table 25: Module absolute maximum ratings.
Parameter | Min | Max | Units | Reference Document |
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5VIN supply voltage | 4.75 | 5.25 | V | USB2.0 specification concerning 'VBUS' voltage |
Operating temperature | -40 | 125 | °C | - |
Table 26: Module recommended operating conditions.
Industrial grade: -40°C to +85°C.
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Please check the operating temperature range of the mounted SoM, which determine the relevant operating temperature range of the overall system.
Board size: 107.70 mm × 100 mm. Please download the assembly diagram for exact numbers.
Mating height with standard connectors: 8 mm.
PCB thickness: ca. 1.65mm.
Highest part on the PCB is the Ethernet RJ-45 jack, which has an approximately 17 mm overall height. Please download the step model for exact numbers.
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Figure 4: Board physical dimensions drawing.
Date | Revision | Notes | PCN | Documentation Link |
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- | 01 | First Production Release | - | TEB0729-01 |
- | 02 | Second Production Release | - | TEB0729-02 |
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Figure 5: Module hardware revision number.
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Table 28: Document change history.
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