Page History

<!--
Template Revision 1.68
(HTML comments will be not displayed in the document, no need to remove them. For Template/Skeleton changes, increase Template Revision number. So we can check faster, if the TRM style is up to date).
-->

<!--
General Notes:
If some section is CPLD firmware dependent, make a note and if available link to the CPLD firmware description. It's in the TE shop download area in the corresponding module -> revision -> firmware folder.
-->

<!--
General Notes:
Designate all graphics and pictures with a number and a description. For example "Figure 1: TE07xx-xx Block Diagram" or "Table 1: Initial delivery state". "Figure x" and "Table x" have to be formatted to bold.  
-->

<!--
Link to the base folder of the module (remove de/ or en/ from the URL): for example:
https://shop.trenz-electronic.de/Download/?path=Trenz_Electronic/Modules_and_Module_Carriers/4x5/4x5_Carriers/TE0703/
  -->

Download PDF version of this document.

Overview

The Trenz Electronic TEB0724-01 is a developement carrier board for the TE0724 and compatible modules. It facilitates easy access to all on the module available features. 

<!--
Use short link the Wiki Ressource page: for example:
http://trenz.org/te0720-info
List of available short links: https://wiki.trenz-electronic.de/display/CON/Redirects
  -->

Refer to http://trenz.org/teb0724-info for the current online version of this manual and other available documentation.

Key Features

• Samtec 160 pin board to board connector for 4,0 cm x 6,0 cm module
• 10x 2x6 Pin Pmods, (8 usable as dual Pmods, 1x single Pmod, 1x I²C compatible Pmod)
• MicroUSB to JTAG/UART bridge
• CAN screw terminal
• RJ45 Gigabit Ethernet MagJack connector
• 6x LED, 2x Push Buttons on FPGA
• 1 LED and 1 Push Button on PS
• Power and Reset Push Buttons
• On-board Power Protection Circuit and Power on LED
  
  

Block Diagram

<!--
Rules for all diagrams:
1. All diagrams are wrapped in the "Scroll Title" macro.
	- The title has to be named with the diagrams name
	- The anchor has the designation figure_x, whereby x is the number of the diagram

2. The Draw.IO diagram has to be inserted in the "Scroll Ignore" macro
	- Border has to be switched off in the macro edit
	- Toolbar has to be hidden in the macro edit

3. A PNG Export of the diagram has to be inserted in the "Scroll Only" macro, see Wiki page "Diagram Drawing Guidelines" how to do this step.

The workaround with the additional PNG of the diagram is necessary until the bug of the Scroll PDF Exporter, which cuts diagram to two pages, is fixed.



IMPORTANT NOTE: In case of copy and paste the TRM skeleton to a new Wiki page, delete the Draw.IO diagrams and the PNGs, otherwise due to the linkage of the copied diagrams every change in the TRM Skeleton will effect also in the created TRM and vice versa!

See page "Diagram Drawing Guidelines" how to clone an existing diagram as suitable template for the new diagram! 


   -->

Main Components

Table 1: TE0724-01 main components.

1. Module connector for 4,0x6.0 cm module
2. Pmods usabel as dual Pmods, J10, J11, J12, J13, J14, J15, J16, J17  
3. Pmod (single), J20  
4. I2C Pmod, J21
5. CAN screw terminal, J2
6. 5V 2.1mm input jack, J18
7. microUSB J4
8. USB to JTAG/UART bridge FT2232H, U1
9. Configuration EEPROM U3
10. RJ45 Gigabit Ehternet Jack, J3
11. Power Button, S1
12. Reset Button, S3
13. User Button PS, S5
14. User LED (green) PS, D8 
15. 2x User Button PL, S2, S4
16. 6x User LEDs (red) PL, D2-D7 
17. Power LED (green), D36
18. 2x10 Pin header for Boot and Programming options, J6
19. 2x6 Pin header for jumper setting of CAN bus termination resistors, J22
20. microSD Card Slot, J5

Initial Delivery State

Not programmed.

Table 2: Initial delivery state of programmable devices on the baseboard.

Boot Process

The boot device is selected by the mode jumpers on pin header J6. Placing a jumper at pin 13-14 sets Mode0 to low level. Mode1 is set to low level by jumper on over pin 15-16. Boot modes are further described at the corresponding section of the modules, e.g. Table 2, Boot mode selection of TE0724 TRM. Default with no jumpers is boot from SD-Card.

Signals, Interfaces and Pins

<!--
Connections and Interfaces or B2B Pin's which are accessible by User
  -->

Board to Board (B2B) I/Os

I/O signals connected to the B2B connector: 

Table 3: General overview of PL I/O signals and SoM's interfaces connected to the B2B connectors.

The TEB0724 carrier board supplies the attached module with 5V DC. All power rails on the  module and the baseboard are generated from this at the module and routed back the carrier. For detailed information about the pin out, please refer to the Pin-out Tables. 

<!--
TO-DO (future):
If Vivado board part files are available for this module, the standard configuration of the MIO pins by using this board part files should be mentioned here. This standard configuration of those pins are also apparent of the on-board peripherals of base-boards related to the module.
  -->

JTAG Interface

There is no device with JTAG port on the baseboard. JTAG access to the module is provided through B2B connector J1. This is routed to the carriers USB to JTAG/UART bridge.

Table 4: JTAG interface signals.

System Control  I/O Pins

Table 5: System Control I/O pins.

<!--
For the detailed function of the pins and signals, the internal signal assignment and implemented logic, look to the Wiki reference page SC CPLD of this module or into the bitstream file of the SC CPLD.
Add link to the Wiki reference page of the SC CPLD, if available.
   -->

SD Card Interface

Table 6: SD Card interface signals and connections.

Ethernet Interface

The TEB0724 Carrier Board has a RJ45 Gigabit Ethernet MagJack (J3) with two LEDs. On-board Ethernet MagJack pins are routed to B2B connector J1 via MDI. LEDs are also routed to the B2B connector.

Ethernet PHY connection

Table 7: Ethernet MagJack

I2C Interface

On-board I²C bus is accaessable with the following pins:

Table 8: I²C pins.

There are no I2C devices on the base board. Pullup resistors have to be provided by the module.

On-board Peripherals

<!--
Components on the Module, like Flash, PLL, PHY...
  -->

Pmods

The GPIOs of the 10 Pmods (J10 to J17, J20, J21) are connected with 100 Ohm differential routing to the B2B connector. J21 is a pure I²C compatible Pmod, without additional signals. The other 9 are GPIO Pmods where despite J20 all others can be used as dual Pmods. By default VCCIO_35 is connected with a 0 Ohm resistor to 3.3V. De-soldering this resistor and using not fitted pin header J19 instead, the variable bank power VCCIO_35 for the Pmods J10, J11, J12, J13, J14, J16 can be selected.

Table 9: Pmod connections.

USB to JTAG/UART bridge

The TEB0724 carrier board has on-board microUSB 2.0 (J4) high-speed to UART/FIFO IC FT2232H (U1) from FTDI. Channel A can be used as JTAG Interface (MPSSE) to program on module JTAG devices. Channel B can be used as UART Interface routed to via a level shifter to the 1.8V section of the B2B connector, usually connected to the PS of the SoM. There is also a 256-byte serial EEPROM connected to the FT2232H chip pre-programmed with license code to support Xilinx programming tools.

CAN Screw Terminal

The CAN bus is routed to screw terminal J2.

Table 10: CAN bus connection.

Jumpers on J22-1 to J22-3 and J22-2 to J22-4 connect proper split termination resistors to the CAN bus.

Oscillators

The module has the following reference clock signals provided by on-board oscillators:

Table 11: Reference clock signals.

On-board LEDs

Table 12: On-board LEDs.

On-board Push Buttons

Table 13: On-board Push Buttons.

Pin Header

Pin Header J6 provides access to power functions, bootmode selection and PMIC In-Circuit Programming.

Table 14: Pin Header J6.

For voltage selection VCCIO_35 (SoM TE0724, Bank 35) other than 3.3V the header J19 can optionaly assembled. Therefore 0 Ohm resistor R45 has to be removed!

Table 15: Optional Pin Header J19.

Optional fitted headers J7, J8 and J9 are to provide full access to the Pins at the B2B connector, especially for testing and extension purposes.  Description follows below.

PL Button and LED IOs are additionally routed to optionally assembled pin header J8.

Table 16: Optional Pin Header J8.

Optional pin header J7 gives access to otherwise not used PS MIO IOs at a 3.3V bank.

Table 17: Optional Pin Header J7.

Optional pin header J9 gives access to otherwise not used PS MIO IOs at a 1.8V bank.

Table 18: Optional Pin Header J9.

Power and Power-On Sequence

<!--
If power sequencing and distribution is not so much, you can join both sub sections together
  -->

Power Consumption

The maximum power consumption depends on the attached module the design running on the module and additional peripherals.

Xilinx provide a power estimator excel sheets to calculate power consumption for FPGAs. It's also possible to evaluate the power consumption of the developed design with Vivado. See also Trenz Electronic Wiki FAQ.

Table 19: Typical power consumption.

 * TBD - To Be Determined soon with reference design setup.

Power supply with minimum current capability of 3A for system startup is recommended.

Power Distribution Dependencies

User should also check related module documentation and Xilinx data sheet, respectively.

Power-On Sequence

The power-on sequence is solely controlled by the attached module. Optional sequenzing signals for integration of additional hardware are PWR_GPIO2 and PWR_GPIO4. If the attached module uses the adjustable bank power VCCIO_35, this has to be powered up after the modules SOCs powerrails are up and before any other signal is applied to the bank IOs. The 1.8V and 3.3V power rails are used for the SD Card level shifter U13. The datasheet states to first power up 1.8V and then 3.3V, this has to be taken into account when reconfiguring the power circuit of the attached SoM.

Power Rails

Table 20 : Board power rails.

Board to Board Connectors

<!--
Generate new entry:
Replace with correct on for selected module series
  -->

The TEB0724 base board has a 160-pin double-row REF-192552-01 connector on the top side.

Table 21: Connectors for module and base board.

Variants Currently In Production

<!--
Set correct link to the overview table of the product on english and german, if not available, set 
https://shop.trenz-electronic.de/de/Produkte/Trenz-Electronic/
https://shop.trenz-electronic.de/en/Products/Trenz-Electronic/
  -->

Technical Specifications

Absolute Maximum Ratings

Table 20: Board absolute maximum ratings.

Recommended Operating Conditions

Table 21: Board recommended operating conditions.

Operating Temperature Ranges

Commercial grade: 0°C to +70°C.

Extended grade: 0°C to +85°C.

Industrial grade: -40°C to +85°C.

Module operating temperature range depends also on customer design and cooling solution. Please contact us for options.

Physical Dimensions

• Module size: 105 mm × 100 mm.  Please download the assembly diagram for exact numbers.

• Mating height with standard connectors: 4 mm.

• PCB thickness: 1.6 mm.

• Highest part on PCB: approx. 13.5 mm. Please download the step model for exact numbers.

All dimensions are given in millimeters.

Scroll Title
title Figure 4: Module physical dimensions drawing.

Revision History

Hardware Revision History

Table 22: Module hardware revision history.

Hardware revision number can be found on the PCB board together with the module model number separated by the dash.

Document Change History

<!--
Generate new entry:
1.add new row below first
2.Copy "Page Information Macro(date)" Macro-Preview, Metadata Version number, Author Name and description to the empty row. Important Revision number must be the same as the Wiki document revision number
3.Update Metadata = "Page Information Macro (current-version)" Preview+1 and add Author and change description.
  -->

Table 23: Document change history.

Disclaimer