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Refer to https://wiki.trenz-electronic.de/display/PD/TE0726+TRM for online version of this manual and additional technical documentation of the product.
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The Trenz Electronic TE0726 "ZynqBerry" is a industrial-grade Raspberry Pi form-factor compatible FPGA SoM (System on Module) based on Xilinx Zynq-7010 SoC (XC7Z010 System on Chip) with up to 512 MByte DDR3L SDRAM, 4 x USB 2.0 ports, 10/100 Mbit Ethernet port and 16 MByte Flash memory.
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There is a System Controller CPLD chip LCMXO2-256HC from Lattice Semiconductor on-board. Refer to the TE0726 CPLD for more information.
Quad SPI Flash Memory
On-board QSPI flash memory (U5) on the TE0726 is provided by Cypress Semiconductor Serial NOR Flash Memory S25FL127SABMFV10 with 128 Mbit (16 MByte) storage capacity connected to the PS MIO bank (MIO1 ... MIO6) of the Zynq SoC. This non volatile memory is used to store initial FPGA configuration. Besides FPGA configuration, remaining free flash memory can be used for user application and data storage. All four SPI data lines are connected to the FPGA allowing x1, x2 or x4 data bus widths. Maximum data rate depends on the selected bus width and clock frequency used.
Clocking
Signal Name | Clock IC | Default Frequency | Destination IC | Pin | Notes |
|---|---|---|---|---|---|
| PS_CLK | U14 | 33.333333 MHz | U1 | C7 | Zynq SoC system reference clock. |
| OSCI | U7 | 12.000000 MHz | U3 | 3 | FT2232H oscillator input. |
| CLK24M | U2 | 24 MHz (see also REFSEL0 .. 2) | U18 | 26 | Reference input/output clock, see datasheet. |
| CLK25M | U13 | 25.000000 MHz | U2 | 61 | External 25 MHz crystal input. |
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Overview
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