Page History
...
| Date | Vivado | Project Built | Authors | Description |
|---|---|---|---|---|
| 2018-03-07 | 2017.4 | TEF1001-test_board_noprebuilt-vivado_2017.4-build_06_20180307102924.zip TEF1001-test_board-vivado_2017.4-build_06_20180307102845.zip | John Hartfiel | 2017.4 update, new assembly variant |
| 2017-11-28 | 2017.2 | TEF1001-test_board-vivado_2017.2-build_05_20171128114335.zip TEF1001-test_board_noprebuilt-vivado_2017.2-build_05_20171128114350.zip | John Hartfiel | initial release |
...
| Software | Version | Note |
|---|---|---|
| Vivado | 2017.24 | needed |
| SDK | 2017.24 | needed |
| SI5338 Clock Builder | --- | optional |
...
| Module Model | Board Part Short Name | PCB Revision Support | DDR | QSPI Flash | Others | Notes |
|---|---|---|---|---|---|---|
| TEF1001-01 160-160-2I | 160_2 | REV01 | SODIMM | 32MB | please, set correct DDR settings on MIG manually | |
| TEF1001-01-325-2C | 325_2 | REV01REV02 | SODIMM | 32MB | Setplease, set correct DDR settings on MIG manually |
Design supports following carriers:
...
Reference Design is available on:
Design Flow
| HTML |
|---|
<!-- Basic Design Steps Add/ Remove project specific --> |
...
| Date | Document Revision | Authors | Description | ||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
|
|
|
| ||||||||||||||||||||||
| 2018-02-08 | v.5 | John Hartfiel |
| ||||||||||||||||||||||
| 2017-11-28 | v.1 |
|
| ||||||||||||||||||||||
| All |
|
...
Overview
Content Tools