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There is no device with JTAG port on the baseboard. JTAG access to the module is provided through B2B connector J1. This is routed to the carriers USB to JTAG/UART bridge.
JTAG Signal | B2B Connector Pin |
|---|---|
| TCK | J1-147 |
| TDI | J1-151 |
| TDO | J1-145 |
| TMS | J1-149 |
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| LED | Color | Signal | Description and Notes |
|---|---|---|---|
| D1 | green | VIN | power indicator |
| D2-D7 | red | ULED1..6 | User LED |
| D8 | green | MIO9 | MIO user LED |
| J3B | green | PHY_LED0 | Ethernet status |
| J3C | yellow | PHY_LED1 | Ethernet status |
Table 10: On-board LEDs.
On-board Push Buttons
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Table 11: On-board Push Buttons.
Power and Power-On Sequence
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If power sequencing and distribution is not so much, you can join both sub sections together
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Power Consumption
The maximum power consumption depends on the attached module the design running on the module and additional peripherals.
Xilinx provide a power estimator excel sheets to calculate power consumption for FPGAs. It's also possible to evaluate the power consumption of the developed design with Vivado. See also Trenz Electronic Wiki FAQ.
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Table 12: Typical power consumption.
* TBD - To Be Determined soon with reference design setup.
Power supply with minimum current capability of 3A for system startup is recommended.
| Warning |
|---|
| To avoid any damage to the base board and attached module, check for stabilized voltages should be carried out (i.e. power good and enable signals) before powering up any SoC's I/O bank voltages VCCO_x. All I/Os should be tri-stated during power-on sequence. |
Power Distribution Dependencies
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| anchor | PD_TEB0724 |
|---|---|
| title | Figure 3: Module power distribution diagram. |
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User should also check related module documentation and Xilinx data sheet, respectively.
Power-On Sequence
The power-on sequence is solely controlled by the attached module. Optional sequenzing signals for integration of additional hardware are PWR_GPIO2 and PWR_GPIO4. If the attached module uses the adjustable bank power VCCIO_35, this has to be powered up after the modules SOCs powerrails are up and before any other signal is applied to the bank IOs.
The 1.8V and 3.3V power rails are used for the SD Card level shifter U13. The Datasheet claims to first power up 1.8V and then 3.3V.
Power Rails
Input
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Power Rail Name
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B2B J1 Pins
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Direction on B2B
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1.8V
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VLDO1
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VBAT
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Table 12 : Board power rails.
Different modules (not just 4 x 5 cm ones) have different type of connectors with different specifications. Following note is for Samtec Razor Beam™ LSHM connectors only, but we should consider adding such note into included file in Board to Board Connectors section instead of here.
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Pin Header
Pin Header J6
J6-2
| PIN | Signal | B2B | Description and Notes |
|---|---|---|---|
| J6-1 | ONKEY | J1-148 | Power Button, pulled up, on push de-asserted |
| J6-2 | RESETREQ | J1-150 | User LED pulled up, on push de-asserted |
| J6-2 | S2 | J1-124 | PL user button, pulled up, on push de-asserted |
| S4 | J1-126 | PL user button, pulled up, on push de-asserted | |
| S5 | MIO51 | J1-42 | PS MIO user button, pulled up, on push de-asserted |
For voltage selection VCCIO_35 of Bank 35 other than 3.3V the header J19 can optionaly assambled. Therefore 0 Ohm resistor R45 has to be removed!
Optional fitted headers J7, J8 and J9 are to provide full access to the Pins at the B2B, especially for testing and extension purposes.
Power and Power-On Sequence
| HTML |
|---|
<!--
If power sequencing and distribution is not so much, you can join both sub sections together
--> |
Power Consumption
The maximum power consumption depends on the attached module the design running on the module and additional peripherals.
Xilinx provide a power estimator excel sheets to calculate power consumption for FPGAs. It's also possible to evaluate the power consumption of the developed design with Vivado. See also Trenz Electronic Wiki FAQ.
| Power Input | Typical Current |
|---|---|
| VIN | TBD* |
Table 12: Typical power consumption.
* TBD - To Be Determined soon with reference design setup.
Power supply with minimum current capability of 3A for system startup is recommended.
| Warning |
|---|
| To avoid any damage to the base board and attached module, check for stabilized voltages should be carried out (i.e. power good and enable signals) before powering up any SoC's I/O bank voltages VCCO_x. All I/Os should be tri-stated during power-on sequence. |
Power Distribution Dependencies
| Scroll Title | ||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| ||||||||||||||||||||
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User should also check related module documentation and Xilinx data sheet, respectively.
Power-On Sequence
The power-on sequence is solely controlled by the attached module. Optional sequenzing signals for integration of additional hardware are PWR_GPIO2 and PWR_GPIO4. If the attached module uses the adjustable bank power VCCIO_35, this has to be powered up after the modules SOCs powerrails are up and before any other signal is applied to the bank IOs.
The 1.8V and 3.3V power rails are used for the SD Card level shifter U13. The Datasheet states to first power up 1.8V and then 3.3V.
Power Rails
Power Rail Name | B2B J1 Pins | Direction on B2B | Notes |
|---|---|---|---|
| VIN | 154, 156, 158, 160 | Output | External main supply voltage. |
| 3.3V | 43, 74 | Input | |
1.8V | 63 | Input | |
| VCCIO_35 | 54 | Output | |
VLDO1 | 83 | Input | |
| VLDO2 | 94 | Input | Used to enable UART level shifter. Therefore fix at 1.8V. |
| VLDO34 | 53 | Input | |
VBAT | 152 | Input/Output | Reserved for PMIC backup battery and charger. |
Table 12 : Board power rails.
Board to Board Connectors
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The TEB0724 base board has two a 160-pin double-row REF-189019192552-02 connectors 01 connector on the bottom top side.
Order | REF Number | Samtec Number | Type | Mated Height | Data sheet | Comment |
|---|---|---|---|---|---|---|
| - | REF-192552-01 | SS5-80-3.50-L-D-K-TR | Baseboard connector | 4 mm | http://suddendocs.samtec.com/catalog_english/ss5.pdf | Standard connector used on board |
| 27220 | REF-192552-02 | ST5-80-1.50-L-D-P-TR | Module connector | 4 mm | http://suddendocs.samtec.com/catalog_english/st5.pdf | Standard connector used on module |
Table 15: Connectors for module and baseboardbase board.
Variants Currently In Production
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